Octavian Mitrea

Constant g/sub m/ rail-to-rail CMOS input stage with improved linearity

The classic CMOS differential amplifier has a strong nonlinearity for large values of the input voltage amplitude, so important odd-order distortion will appear for a sinusoidal input voltage. This paper presents a new original technique to improve the linearity of a CMOS differential amplifier by canceling the third and the fifth terms of the Taylor series of the output current. In order to obtain an extended range of the input voltage, two complementary CMOS differential amplifiers are used to achieve a constant transconductance of the input stage for rail-to-rail common mode input voltage, a maximum current selecting circuit is added. SPICE simulation using MOSIS 0.8/spl mu/ confirms the theoretical analysis.

A linearization technique for radio frequency CMOS Gilbert-type mixers

This paper demonstrates a linearization technique for radio frequency (R-F) CMOS Gilbert cell-based mixers. The main idea is to replace the simple differential pair of the basic mixer with a cross-connected one. When one specific design condition (also determined in the paper) is fulfilled, the third-order harmonic of the output signal is canceled, causing a major improvement of the third intercept point (IP3) of the mixer. In practice, the maximal achievable IP3 is limited by mismatches and models simplifications. Simulations results of the proposed circuit (using SpectreRF and the 0.35/spl mu/m CMOS AMS technology) show an IP3 improvement of /spl sim/8dB (5.25dBm comparing to -3dBm of the classical Gilbert cell). Our approach is very attractive because it necessitates only a small increase in the bias current 1.125mA vs. 1 mA and input capacitance - 1.5/sub Gilbert/ vs. C/sub Gilbert/, and is feasible for use in multi-standard receivers.

A low-IF architecture for dual-standard GSM/UMTS fully integrated receivers

This paper proposes a compact, dual-standard, low-IF receiver, that has been analyzed and designed at architectural level for GSM and UMTS standards. The design requirements that have been derived for the receiver building blocks indicate that most of them (excepting the image reject filters and the channel-select filters) can be implemented to operate in both modes. Our highly integrated solution includes also a /spl Sigma//spl Delta/ modulator that can be reconfigured for each standard.

Low-power CMOS active resistor independent of the threshold voltage

This paper presents a new linearity improvement technique for a CMOS active resistor. The method is based on the cancellation of the main odd-order nonlinear terms and bulk effect, using a parallel connection of two active resistors opposite excited, with different polarisation voltages. The resistor is designed to work for an extended range of the input voltages, and achieves an improvement in linearity about a magnitude order. The utilization area of this active resistor includes, but is not limited to active filters, switched capacitor circuits or medical applications. Its theoretical estimated performance, linearity error 0.35% for an input range of /spl plusmn/500 mV, was confirmed by SPICE simulations. The circuit draws a very small amount of current from a /spl plusmn/3.3 V voltage source, being suitable for low-power applications. The resistor was implemented in 0.35 /spl mu/ CMOS AMS technology and the layout area is about 60 /spl mu/m/spl times/80 /spl mu/m.