Ozan E. Erdogan
Qualcomm
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Publication
Featured researches published by Ozan E. Erdogan.
international solid-state circuits conference | 2005
Ozan E. Erdogan; R. Gupta; Dennis G. Yee; Jacques C. Rudell; Jin-Su Ko; Roger Brockenbrough; Emilia Lei; Joo Leong Tham; Hongbing Wu; Cormac S. Conroy; Beomsup Kim
A 0.18 /spl mu/m CMOS single-chip fully integrated quad-band GSM/GPRS transceiver is presented. The low-IF receive section achieves -110dBm sensitivity at the antenna and -15dBm IIP3. The offset-frequency PLL transmitter achieves 1.2/spl deg/ rms phase noise, -65dBc modulation mask at 400kHz, and -165dBc/Hz noise at 20MHz. The chip occupies 17mm/sup 2/ and dissipates 95mA/112mA in receive/transmit mode.
international solid-state circuits conference | 2005
Jacques C. Rudell; Ozan E. Erdogan; Dennis G. Yee; Roger Brockenbrough; Cormac S. Conroy; Beomsup Kim
A 0.18 /spl mu/m CMOS fifth-order harmonic-rejection G/sub m/C filter is presented for use in offset PLL transmitter applications. Using an in-situ calibration scheme with a tuning accuracy of 2% and a maximum calibration time of 90 /spl mu/s, this filter tunes from 52 to 151MHz and draws 7mA from a 1.8V supply while achieving an IIP3 of 7dBV with an output noise floor of 9.3 /spl mu/V in a 30kHz BW.
european solid state circuits conference | 2016
Saikrishna Ganta; Alfredo Tomasini; Ajay Taparia; Taehee Cho; Mandar Kulkarni; Ozan E. Erdogan
This publication presents a cyclic A/D converter system, which can be used for column-parallel sensor readout applications. The converter system includes ADC, fully integrated ADC references, timing generator, calibration engine, and an on-chip ramp generator for complete on-chip testing. This publication solves the exaggerated issue of feed-forward transient glitches in capacitor-shared cyclic and pipelined ADCs. This publication also solves some existing issues in fully integrated references of pipeline and cyclic ADC, namely reduced voltage range, and memory effects. The area of the core cyclic ADC operating at 12 bit resolution and 2MS/s conversion rate is only 0.016mm2. The measured DNL and INL are +0.47/-0.68 LSB and +/-0.99 LSB respectively. The ADC is implemented in TSMC 55nm CMOS technology using 3.3V devices, the ADC consumes 850μW from 3.3V supply.
Archive | 2005
Beomsup Kim; Ozan E. Erdogan; Dennis G. Yee
Archive | 2014
Ali Ekici; Ozan E. Erdogan; Stephen C. Gerber; Syed F. Ahmad
Archive | 2005
Ozan E. Erdogan; Cormac S. Conroy
Archive | 2006
Ozan E. Erdogan; Jacques C. Rudell; Roger Brockenbrough
Archive | 2016
Guozhong Shen; Ozan E. Erdogan; Ajay Taparia; Erik Jonathon Thompson
Archive | 2015
Guozhong Shen; Ozan E. Erdogan; Taehee Cho
Archive | 2012
Ozan E. Erdogan; Guozhong Shen; Rajesh Anantharaman; Ajay Taparia; Behrooz Javid; Syed T. Mahmud; Rahim F. Chowdhury