P. Lehnen

Dielectric properties of dysprosium- and scandium-doped hafnium dioxide thin films

Dysprosium- and scandium-doped HfO2 films have been deposited by atomic-vapor deposition on SiO2∕Si substrates. Glancing-incidence x-ray diffraction demonstrates that Dy0.10Hf0.90Ox and Sc0.10Hf0.90Ox films show a cubic crystal structure, whereas HfO2 films are monoclinic. The dielectric permittivity increases strongly from 16 for HfO2 to 32 for Dy0.10Hf0.90Ox and Sc0.10Hf0.90Ox. This leads to a reduction of the leakage current in the tunneling regime by up to three orders of magnitude for constant effective oxide thickness. For thick films (≳6nm), it is shown that leakage occurs via the Poole-Frenkel mechanism and that doping HfO2 increases leakage for constant physical oxide thickness.

Silicate formation and thermal stability of ternary rare earth oxides as high-k dielectrics

Hf-based dielectrics are currently being introduced into complementary metal oxide semiconductor transistors as replacement for SiON to limit gate leakage current densities. Alternative materials such as rare earth based dielectrics are of interest to obtain proper threshold voltages as well as to engineer a material with a high thermal stability. The authors have studied rare earth based dielectrics such as Dy2O3, DyHfOx, DyScOx, La2O3, HfLaOx, and LaAlOx by means of ellipsometry, time of flight secondary ion mass spectroscopy x-ray diffraction, and x-ray photoelectron spectroscopy. The authors show that ellipsometry is an easy and powerful tool to study silicate formation. For ternary rare earth oxides, this behavior is heavily dependent on the composition of the deposited layer and demonstrates a nonlinear dependence. The system evolves to a stable composition that is controlled by the thermal budget and the rare earth content of the layer. It is shown that silicate formation can lead to a severe overe...

The characteristics of hole trapping in HfO2/SiO2 gate dielectrics with TiN gate electrode

The characteristics of charge trapping during constant voltage stress in an n-type metal–oxide–semiconductor capacitor with HfO2∕SiO2 gate stack and TiN gate electrode were studied. We found that the dominant charge trapping mechanism in the high-k gate stack is hole trapping rather than electron trapping. This behavior can be well described by the distributed capture cross-section model. In particular, the flatband voltage shift (ΔVfb) is mainly caused by the trap filling instead of the trap creation [Zafar et al., J. Appl. Phys. 93, 9298 (2003)]. The dominant hole trapping can be ascribed to a higher probability for hole tunneling from the substrate, compared to electron tunneling from the gate, due to a shorter tunneling path over the barrier for holes due to the work function of the TiN gate electrode.

Thermal stability of dysprosium scandate thin films

The thermal stability of DyScO3 thin films in contact with SiO2 or HfO2 during annealing up to 1000°C has been studied. It is found that DyScO3∕SiO2 stacks react during annealing and a phase separation into polycrystalline Sc-rich (and relatively Si-poor) DySc silicate on top of an amorphous Dy-rich DySc silicate is observed. In contrast, DyScO3 is found to be thermodynamically stable in contact with HfO2 and to recrystallize upon annealing. These results demonstrate that the previously reported high crystallization temperature of >1000°C for DyScO3 is not an intrinsic material property but caused by silicate formation.

Metallorganic Chemical Vapor Deposition of Dysprosium Scandate High-k Layers Using mmp-Type Precursors

Rare-earth scandate materials have been identified as candidates for gate dielectrics in metal oxide semiconductor transistors because of their high thermal stability against crystallization in combination with a high-dielectric constant. In this study, tris(1-methoxy-2-methyl-2-propoxy)dysprosium [Dy(mmp) 3 ] and Sc(mmp) 3 are evaluated as metallorganic chemical vapor deposition precursors for deposition of Dy x Sc y O z on silicon at moderate temperatures (450-600°C). These temperatures allow easy integration into a standard transistor flow. The layers are uniform with a close to bulk density and smooth top surface. Electrical characterization measurements shows a gate leakage current of 1.8 X 10 -5 A/cm 2 at 4.5 V for an equivalent oxide thickness of 2.0 nm. Limited hysteresis (9 mV) and frequency dispersion (3% difference in accumulation capacitance between 10 and 250 kHz) was observed.

High-performance Pt/SrBi/sub 2/Ta/sub 2/O/sub 9//HfO/sub 2//Si structure for nondestructive readout memory

Metal-ferroelectric-insulator-semiconductor (MFIS) capacitors with 390-nm-thick SrBi/sub 2/Ta/sub 2/O/sub 9/ (SBT) ferroelectric film and 8-nm-thick hafnium oxide (HfO/sub 2/) layer on silicon substrate have been fabricated and characterized. It is demonstrated for the first time that the MFIS stack exhibits a large memory window of around 1.08 V at an operation voltage of 3.5 V. Moreover, the MFIS memory structure suffers only 18% degradation in the memory window after 10/sup 9/ switching cycles. The excellent performance is attributed to the formation of well-crystallized SBT perovskite thin film on top of the HfO/sub 2/ buffer layer, as evidenced by the distinctive sharp peaks in X-ray diffraction (XRD) spectra. In addition to its relatively high /spl kappa/ value, HfO/sub 2/ also serves as a good seed layer for SBT crystallization, making the proposed Pt/SrBi/sub 2/Ta/sub 2/O/sub 9//HfO/sub 2//Si structure ideally suitable for low-voltage and high-performance ferroelectric memories.

Flatband voltage shift of ruthenium gated stacks and its link with the formation of a thin ruthenium oxide layer at the ruthenium/dielectric interface

A systematic study about the flatband voltage (Vfb) shift of Ru gated metal-oxide-semiconductor stacks after thermal treatment in O2 has been performed. The dependence of the Vfb shift on the anneal time and temperature and the thickness of Ru was studied in detail, and a clear link between the Vfb shift and an oxygen diffusion process in Ru was observed. A high temperature thermal treatment of the devices prior to the O2 anneal has no significant impact on the Vfb shift. The Vfb shift is ascribed to the shift of metal gates’ work function, and is not intrinsic to HfO2 gated stacks as similar behavior was also observed on SiO2, from the combination of internal photoemission and conventional capacitance-voltage measurement. No similar Vfb shift was observed for TiN gated stacks and the Vfb shift seems to be more related to the properties of gate electrodes other than those of gate dielectrics. After thermal treatment in O182, from time-of-flight secondary ion mass spectrometry measurement, it was found tha...

Electrical Characterization of Capacitors with AVD-Deposited Hafnium Silicates as High-k Gate Dielectric

We discuss the electrical properties of hafnium silicates with various composition deposited by atomic vapor deposition (AVD) as metal-oxide-semiconductor (MOS) capacitors. The deposited layers demonstrate well-behaved capacitance as function of gate voltage (CV) curves with a leakage as low as 5×10 - 2 for an equivalent oxide thickness (EOT) of 1.3 nm. The permittivity (k-value) ranges from 6 to 14 depending on the composition of the hafnium silicate. Flatband voltage depends on the composition (and thickness) and varies between -0.10 and 0.45 V, from which we calculated the amount of net charge in the layer, between (-6 ′ 3)×10 1 1 and (20 ′ 3) X 10 1 1 /cm 2 . Postdeposition treatments at 800°C in O 2 or NH 3 shift the V F B position up to 100 mV, together with a change of the amount of net charge. Fine-tuning the deposition and composition might nullify the net charge contribution in the layers.

AVD® technology for deposition of next generation devices

Abstract One of the main challenges in semiconductor industry today is the problem that arises with the performance of Moore’s Law, doubling every 18 months. For instance, the device shrinking of CMOS based devices calls for new material candidates to replace conventional dielectrics and electrodes. Here, an advanced technology called Atomic Vapour Deposition (AVD®) is presented, which combines the MOCVD advantages of high throughput with atomic layer control and excellent material properties. The discussion is based on high-k oxides and conductive materials.

Low V t Ni-FUSI CMOS Technology using a DyO cap layer with either single or dual Ni-phases

This paper reports a novel approach to implement low V_t Ni-FUSI bulk CMOS by using a dysprosium oxide (DyO) cap layer on both HfSiON and SiON host dielectrics. We show for the first time that an ultra-thin DyO cap layer (5 Aring) can lower the NiSi FUSI nFET V_t by 300 mV/500 mV on HfSiON/SiON (resulting in a V_t,lin of 0.25 V/0.18 V respectively), w/o compromising the T_inv (<1 Aring variation), gate leakage, mobility or reliability. We observed that the DyO cap on SiON can convert into a DySiON silicate with similar electrical properties as HfSiON but much lower Vt, greatly-improved PBTI and 150times lower J_g wrt SiON. By demonstrating a novel DyO cap layer selective removal process, this work also points out the feasibility to realize low V_t CMOS using either dual phase (NiSi, Ni₃₂Si₁₂) or single phase (Ni₂Si) FUSI gate for both n-and pFETs.