P. Soussan

Cu/Sn microbumps interconnect for 3D TSV chip stacking

The electronics industry is increasingly looking to 3D integration in order to address the ever continuing product needs of miniaturization and performance increase for future generation of ICs. Most of these integration schemes require multiple die stacking on top of each other. In this work, transient liquid phase (TLP) bonding technique using Cu-Sn intermetallic is used for die stacking. Fast die to wafer pick and place operation followed by collective bonding process is described here for bonding application. Low temperature stacking is also explored using solid metal bonding (SMB) process and the effect of various cleaning agents on the bonding interface is discussed. Finally, in this paper we report on die stacking using microbumps with dies containing through silicon visa (TSV).

A compact, high-speed, and low-cost hyperspectral imager

Although the potential of hyperspectral imaging has been demonstrated for several applications, using laboratory setups in research environments, its adoption by industry has so far been limited due to the lack of high speed, low cost and compact hyperspectral cameras. To bridge the gap between research and industry, we present a novel hyperspectral sensor that integrates a wedge filter on top of a standard CMOS sensor. To enable the low-cost processing of a microscopic wedge filter, we have introduced a design that is able to compensate for process variability. The result is a compact and fast hyperspectral camera made with low-cost CMOS process technology. The current prototype camera acquires 100 spectral bands over a spectral range from 560 nm to 1000 nm, with a spectral resolution better than 10 nm and a spatial resolution of 2048 pixels per line. The speed is 180 frames per second at illumination levels as typically used in machine vision. The prototype is a hyperspectral line scanner that acquires 16 lines per spectral band in parallel on a 4 MPixel sensor. The theoretic line rate for this implementation is thus 2880 lines per second.

Impact of thinning and through silicon via proximity on High-k / Metal Gate first CMOS performance

3D integration has the potential to alleviate the performance limitations that CMOS scaling is facing provided that it preserves the integrity of both front end and back end devices and constituting materials. The impact of wafer thinning and of the proximity of through silicon via on active devices, back end structures, ring oscillators and mixed signal circuit are reported for the first time for a High-k/Metal Gate first strained CMOS technology with low-k BEOL. The relative stress induced by the STI and the TSV are measured by micro-Raman spectroscopy. The measured impact of the stress on a sensitive DAC circuit is used to define a safe keep out area.

A reliable and compact polymer-based package for capacitive RF-MEMS switches

We present a package for capacitive RF-MEMS switches that is based on laminate substrates and BCB-sealed glass caps. The assembly is realised using standard packaging equipment. The package is only 1.1 mm thick, gross leak tight, has high mechanical strength, and passes accelerated lifetime testing. RF insertion loss was lower than 0.6 dB below 15 GHz. Capacitive switches packaged by the proposed method reach a lifetime of 10/sup 7/ cycles, and sustain 1000 h exposure at 85/spl deg/C/85%RH.

Microstrip thin-film MCM-D technology on high-resistivity silicon with integrated through-substrate vias

The integration of through-substrate vias on 100 mum thick high-resistivity silicon (HRSi) wafers within the thin-film multi-chip module technology (MCM-D) is demonstrated in this paper. High quality integrated lumped elements such as thin-film resistors, capacitors and inductors are demonstrated on a microstrip configuration within an MCM-D technology. Microstrip lines integrated on the thin HRSi present a quality factor 2.5 times higher than CPW lines with similar dimensions on AF45 glass, highlighting the advantages of using microstrip type of circuits. High-quality distributed-element bandpass filters at 30 GHz are presented proving the ability of the technology to integrate high frequency circuits as well. Being able to integrate high quality passive components at various frequencies, it is a powerful technology platform for the integration of high performance system in a package (SiP) modules.

High-resistivity silicon surface passivation for the thin-film MCM-D technology

High-resistivity silicon (HRSi) has excellent properties as substrate material to integrate microwave passive components. However, the existence of a layer of free surface charges under the silicon-silicon dioxide interface generated by impurities in the SiO2 and in the interface itself undermines the RF properties of the bulk HRSi. This paper demonstrates how the surface charges increase the RF loss of CPW lines processed on HRSi and make their loss DC dependent. It also presents how Ar implantation can successfully restore the excellent RF properties of the bulk HRSi in terms of loss and DC dependency. The temperature stability of this technique is also studied and proved to withstand temperatures up to 300degC, which is sufficient for Imecs MCM-D technology implementation

Ar Implantation, a Passivation Technique for High-Resistivity Silicon within the MCM-D Technology

High-resistivity silicon (HRSi) has excellent properties as substrate material to integrate microwave passive components and system in a package (SiP) modules. However, the existence of a layer of free surface charges under the silicon-silicon dioxide interface generated by impurities in the SiO2 and in the interface itself undermines the RF properties of the bulk HRSi. This paper demonstrates that the surface charges increase the RF loss of CPW lines processed on HRSi and make their loss DC dependent. It also presents how Ar implantation can successfully restore the excellent RF properties of the bulk HRSi in terms of loss and DC dependency. An Ar implant dose 10 times lower than previously reported is demonstrated to be sufficient, lowering the cost of the passivation step. The substrate loss of passivated HRSi is shown to be comparable to that of AF45 glass regarding inductors and a better Q for CPW lines has been measured in the case of HRSi. This approach withstands the most critical processing step of imecs MCM-D technology and therefore it is a suitable technique to passivate the surface of HRSi within this technology

High density 20μm pitch CuSn microbump process for high-end 3D applications

In this paper, we present a high yielding 20μm pitch CuSn electroplated microbump flip chip process. The 10μm diameter bumps are organized in an area array, consisting of 440 daisy chains of 1766 bumps each. The 2cm × 2cm flip-chipped dies consist of about 1M bumps in total. The influence of processing materials like seed layer etchants and cleaning agents on the electrical performance of the daisy chains is discussed. Further Ti/Cu versus TiW/Cu seed layers for electroplating are compared. Finally inspection methods for tracing back electrically measured failures are screened.

A surface micromachined tunable film bulk acoustic resonator

This paper reports on the design, modeling, fabrication and measurement of a novel-structured film bulk acoustic resonator (FBAR) that allows frequency tuning by MEMS actuation. FBARs are micromachined frequency controlling devices working in RF regime. For many applications, a small range of tuning is desired to cope with drifts from different origins. To realize this functionality, it has been suggested to place tunable elements such as variable capacitors or inductors in the circuit. A conventional approach, in which an external element is used, would introduce parasitics and might seriously degrade the quality factor of the system. In contrast, our work integrates the piezoelectric resonating film and the tuning element to build a compact structure. By reducing possible parasitics and electrical resistance, this structure enables frequency tuning while maintaining a high quality factor.

Heterogeneous Integration of Passive Components for the Realization of RF-System-in-Packages

Applications using rf radios operating at frequencies above 1 GHz are proliferating. The highest operating frequencies continue to increase and applications above 10 GHz and up to 77 GHz are already emerging. Systems become more complex and devices need to operate at several different frequency bands using different wireless standards. The rf-front end sections of these devices are characterized by a high diversity of components, in particular high precision passive components. In order to be produced cost-effectively, these elements need to be integrated along with the semiconductor devices. This paper describes the requirements for successful integration of rf-passive devices and proposes multilayer thin film technology as an effective rf-integration technology.