Paul W. Ackmann

Phase shifting and optical proximity corrections to improve CD control on logic devices in manufacturing for sub-0.35-um i-line

The use of I-Line exposure wavelength for manufacturing at and beyond 0.35 micrometers presents many challenges in manufacturing. The lack of resolution, depth of focus, exposure latitude, and iso/dense offsets have caused some to switch from I-Line to DUV. With our installed I-Line base we felt it necessary to implement techniques to extend our tool life, reduce manufacturing costs while improving manufacturing margins. The results of the differential modification techniques were used to reduce the effects of topography, density, and low k lens issues. The differences seen between the binary and phase shift plates show the advantage of phase shifting below 0.35 (mu) manufacturing. We have been able to demonstrate between critical dimension (CD) control using phase shift mask with dense iso compensation over a standard binary reticle. The data shows improved CD control across the stepper field, wafer, and overall lot distribution. The impact of this work was improved speed performance. It also allowed us to move the CDs to smaller dimension because of the better control without increasing fallout due to electrical parametric roll-off.

Characterization of autofocus uniformity and precision on ASML steppers using the phase-shift focus monitor reticle

This paper details a method that was used to evaluate and characterize autofocus uniformity and repeatability issues which were exhibited on ASML 5500/100 Stepper systems at Advanced Micro Devices in Austin, Texas. Equally significant is the process by which these issues were resolved through a cooperative effort with ASM Lithography, which is also discussed. Data shown in this paper was collected using the Phase Shift Focus Monitor Reticle, produced by Benchmark Technologies. The coactive relationship between ASML and AMD was integral in identifying the cause of this long-standing condition, as well as providing and implementing the required solution.

Factors that determine the optimum reduction factor for wafer steppers

The optimum reduction factor for stepper lenses is determined by trade-offs among several competing constraints and practical limitations. Lens reduction factor were chosen initially on the basis of several factors, including maximum lens element size, usable reticle field, stepper throughput and reticle glass size. These considerations led to the choice of 5x for the reduction factor initially and 4x for the most recent generation of step-and-scan systems. A large reduction factor is beneficial because it reduces the negative impacts of reticle linewidth variations, reticle registration errors, and reticle defects. This is particularly important for optical lithography processes that operate near the diffraction limit, where the mask error factor can be large. For this reason, as well travel down the roadmap, the 4x reduction factor for critical stepper lenses needs to be reconsidered. Before a decision is made, all consequences of a large reduction factor must be taken in to account. For fixed field sizes, reduction factors have been limited to 4x in order to achieve compatibility between 26 mm X 33 mm field sizes and 6 inch reticles, and the assumption of large die size. The reduction factor of 4x can be reconsidered if prior predictions of large die size are not realized of capability for making 230 mm reticles becomes available. The economics of 230 mm reticles changes favorably when the reduction factor is increased. Large reduction factors have relatively neutral effects on lens cost, but will make fast scanning more difficult. A proposal for a possible new optimum reduction is given from the analysis of these critical factors.

Technology interactions on reticle delivery

Reticle cost and cycle time to deliver new circuit designs to a wafer fab remain key focus areas for advanced semiconductor manufacturing and new product development. Resolution enhancement techniques like optical proximity correction as applied to critical layers have increased the burden on mask data preparation and reticle writing steps of the mask making flow. The growing data volume and complexity of designs must be reduced to a perfect image on a reticle in the shortest time possible against computer and machine constraints. Continued dependence on 193 nm wavelength exposure in extremely low k1 lithography exacerbates the underlying trends. Two important factors come together to drive the economics and performance of the reticle line: the complexity of the designs and the productivity of e-beam writing tools. The designs, OPC methods, and writing tool capabilities continue to evolve with each node of technology. The study builds on prior evaluations to look at fundamental pattern complexity across 90nm, 65nm, and 45nm logic designs using the gate and metal-1 critical layers. The writing tool throughput testing uses a range of standard patterns to establish shot limited performance as a calibration method for arbitrary designs. Node to node design and tool to tool generation comparisons highlight actual step changes in complexity and capability by introducing new quantitative methods, benchmarking metrics, and testing strategies. The findings are projected into the future using design complexity and writing tool trends to suggest implications about reticle cost, cycle time, or possible gaps in technology development.

Real-time on-wafer evaluation of contaminant-induced defects from resist processing

In this paper we present a new non-contact, non-destructive method for real-time evaluation of both surface and interface metallic contamination from resists. The method allows for independent testing at the completion of a coat/ash or ash/removal/clean steps in processing. Using a standard 1.2 micrometer resist in both as-received and intentionally doped versions wherein alkaline and transition metals such as K, Fe, Cr, and Cu were added to the initial solution, we demonstrate that at both these crucial steps in resist processing important electrical and material parameters such as bulk Fe concentration, minority carrier diffusion length, relative surface recombination velocity, and surface charge can be detected directly on- a processed test wafer with no electrical test structures using a combination of low and high injection level surface photovoltage. Since most production fabs only test for residual particles in-line, or rely on expensive, time-consuming analytical techniques such as AAS, DLTS, or TXRF to evaluate contaminant metals, this approach offers a faster and a more economical way to control this problem.

Manufacturing engineering use of data management to analyze and control stepper performance in existing fabs and on stepper evaluations for new tools

This paper describes the program used to improve data collection and analysis methods in a sub-micron manufacturing environment to control photolithography steppers. The program provides any user a standard method for analysis. The benefits of this methodology are a reduction in analysis time, uniform analysis by use of similar algorithms, and the reduction in the use of multiple database programs. The programs outputs include customized reports, focus exposure curves, data tables, and SPC charts. By storing all information, historical data can be accessible in these output forms. This paper briefly explains the medium used to transfer the data from the stepper and metrology systems. Explanation of the use and results of the on-line data analysis program and examples of the programs output are also given. The program was developed to support manufacturing from 0.8 micrometers to 0.35 micrometers i-line production. The authors feel the programs are flexible enough to add more outputs for different technologies.