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Dive into the research topics where Peter B. Gray is active.

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Featured researches published by Peter B. Gray.


bipolar/bicmos circuits and technology meeting | 2001

A 0.18 /spl mu/m BiCMOS technology featuring 120/100 GHz (f/sub T//f/sub max/) HBT and ASIC-compatible CMOS using copper interconnect

Alvin J. Joseph; D. Coolbaugh; Michael J. Zierak; R. Wuthrich; Peter J. Geiss; Zhong-Xiang He; Xuefeng Liu; Bradley A. Orner; Jeffrey B. Johnson; G. Freeman; David C. Ahlgren; Basanth Jagannathan; Louis D. Lanzerotti; John C. Malinowski; Huajie Chen; J. Chu; Peter B. Gray; Robb Allen Johnson; James S. Dunn; Seshadri Subbanna; Kathryn T. Schonenberg; David L. Harame; R. Groves; K. Watson; D. Jadus; M. Meghelli; A. Rylyakov

A BiCMOS technology is presented that integrates a high performance NPN (f/sub T/=120 GHz and f/sub max/=100 GHz), ASIC compatible 0.11 /spl mu/m L/sub eff/ CMOS, and a full suite of passive elements. Significant HBT performance enhancement compared to previously published results has been achieved through further collector and base profile optimization guided by process and device simulations. Base transit time reduction was achieved by simultaneously increasing the Ge ramp and by limiting the base diffusion with the addition of carbon doping to SiGe epitaxial base. This paper describes IBMs next generation SiGe BiCMOS production technology targeted at the communications market.


bipolar/bicmos circuits and technology meeting | 2014

A 90nm SiGe BiCMOS technology for mm-wave and high-performance analog applications

John J. Pekarik; James W. Adkisson; Peter B. Gray; Q.Z. Liu; Renata Camillo-Castillo; Marwan H. Khater; Vibhor Jain; Bjorn Zetterlund; A. W. Divergilio; Xiaowei Tian; Aaron L. Vallett; John J. Ellis-Monaghan; Blaine J. Gross; Peng Cheng; Vikas K. Kaushal; Zhong-Xiang He; J. Lukaitis; K.M. Newton; M. Kerbaugh; N. Cahoon; Leonardo Vera; Yi Zhao; John R. Long; Alberto Valdes-Garcia; Scott K. Reynolds; W. Lee; B. Sadhu; David L. Harame

We present the electrical characteristics of the first 90nm SiGe BiCMOS technology developed for production in IBMs large volume 200mm fabrication line. The technology features 300 GHz fT and 360 GHz fMAX high performance SiGe HBTs, 135 GHz fT and 2.5V BVCEO medium breakdown SiGe HBTs, 90nm Low Power RF CMOS, and a full suite of passive devices. A design kit supports custom and analog designs and a library of digital functions aids logic and memory design. The technology supports mm-wave and high-performance RF/Analog applications.


bipolar/bicmos circuits and technology meeting | 1999

A 0.24 /spl mu/m SiGe BiCMOS mixed-signal RF production technology featuring a 47 GHz f/sub t/ HBT and 0.18 /spl mu/m L/sub ett/ CMOS

S. St Onge; David L. Harame; James S. Dunn; Seshadri Subbanna; David C. Ahlgren; G. Freeman; Basanth Jagannathan; J. Jeng; Kathryn T. Schonenberg; Kenneth J. Stein; R. Groves; D. Coolbaugh; Natalie B. Feilchenfeld; Peter J. Geiss; M. Gordon; Peter B. Gray; Douglas B. Hershberger; S. Kilpatrick; Robb Allen Johnson; Alvin J. Joseph; Louis D. Lanzerotti; John C. Malinowski; Bradley A. Orner; Michael J. Zierak

A new base-after-gate integration scheme has been developed to integrate a 47 GHz f/sub t/, 65 GHz F/sub max/SiGe HBT process with a 0.24 /spl mu/m CMOS technology having 0.18 /spl mu/m L/sub eff/ and 5 nm gate oxide. We discuss the benefits and challenges of this integration scheme which decouples the HBT from the CMOS thermal cycles. We also describe the resulting 0.24 /spl mu/m SiGe BiCMOS technology, BiCMOS 6HP, which includes a 7 nm dual gate oxide option and full suite of passive components. The technology provides a high level of integration for mixed-signal RF applications.


radiation effects data workshop | 2012

Total Dose and Transient Response of SiGe HBTs from a New 4th-Generation, 90 nm SiGe BiCMOS Technology

Nelson E. Lourenco; Robert L. Schmid; Kurt A. Moen; Stanley D. Phillips; Troy D. England; John D. Cressler; John J. Pekarik; James W. Adkisson; Renata Camillo-Castillo; Peng Cheng; John Ellis Monaghan; Peter B. Gray; David L. Harame; Marwan H. Khater; Qizhi Liu; Aaron L. Vallett; Bjorn Zetterlund; Vibhor Jain; Vikas K. Kaushal

The total ionizing dose and laser-induced transient response of a new 4th generation 90 nm IBM SiGe 9HP technology are investigated. Total dose testing was performed with 63.3 MeV protons at the Crocker Nuclear Laboratory at the University of California, Davis. Transient testing was performed on the two-photon absorption system at Naval Research Laboratory. Results show that the SiGe HBTs are dose-tolerant up to 3 Mrad(SiO2) and exhibit reduced single event transients compared to earlier SiGe generations.


bipolar/bicmos circuits and technology meeting | 2007

A 0.35 μm SiGe BiCMOS technology for power amplifier applications

Alvin J. Joseph; Qizhi Liu; Wade J. Hodge; Peter B. Gray; Kenneth J. Stein; Rose Previti-Kelly; Peter J. Lindgren; Ephrem G. Gebreselasie; Ben Voegeli; Panglijen Candra; Doug Hershberger; Ramana M. Malladi; Ping-Chuan Wang; K. Watson; Zhong-Xiang He; James S. Dunn

In this paper we introduce, a state-of-the-art SiGe BiCMOS power amplifier technology that features two NPNs with 40 GHz / 6.0 V & 27 GHz / 8.5 V (fT - BVceo) respectively, a novel low inductance metal ground through-silicon-via (TSV), integrated on a low-cost 0.35 μm lithography node with 3.3 V / 5.0 V dual-gate CMOS technology and high-quality passives on a 50 Ω.cm substrate.


bipolar/bicmos circuits and technology meeting | 2002

High performance, low complexity 0.18 /spl mu/m SiGe BiCMOS technology for wireless circuit applications

Natalie B. Feilchenfeld; Louis D. Lanzerotti; David C. Sheridan; Ryan W. Wuthrich; Peter J. Geiss; D. Coolbaugh; Peter B. Gray; J. He; P. Demag; J. Greco; T. Larsen; V. Patel; Michael J. Zierak; Wade J. Hodge; Jay Rascoe; J. Trappasso; Bradley A. Orner; A. Norris; Douglas B. Hershberger; B. Voegeli; Steven H. Voldman; Robert M. Rassel; V. Ramachandrian; Michael L. Gautsch; Ebenezer E. Eshun; R. Hussain; D. Jordan; S. St Onge; James S. Dunn

High frequency performance at low current density and low wafer cost is essential for low power wireless BiCMOS technologies. We have developed a low-complexity, ASIC-compatible, 0.18 /spl mu/m SiGe BiCMOS technology for wireless applications that offers 3 different breakdown voltage NPNs; with the high performance device achieving F/sub t//F/sub max/ of 60/85 GHz with a 3.0 V BV/sub CEO/. In addition, a full suite of high performance passive devices complement the state-of-the-art SiGe wireless HBTs.


bipolar/bicmos circuits and technology meeting | 2004

A low complexity 0.13 /spl mu/ SiGe BiCMOS technology for wireless and mixed signal applications

Louis D. Lanzerotti; Natalie B. Feilchenfeld; D. Coolbaugh; James A. Slinkman; Peter B. Gray; David C. Sheridan; J. Higgins; Wade J. Hodge; M. Gordon; T. Larsen; Michael L. Gautsch; P. Lindgren; R. Murty; Jay Rascoe; K. Watson; T. Stamper; Ebenezer E. Eshun; J. He; K. Downes; Robert M. Rassel; J. Greco; B. Labelle; S. Sweeney; Kenneth J. Stein; R. Bolam; K. Vaed; B. Omer; Alvin J. Joseph; S. St Onge; J. Dunn

We present IBMs next-generation, cost-performance-optimized BiCMOS technology (BiCMOS 8WL) which combines a state-of-the-art suite of SiGe NPNs, foundry compatible 0.13 μm CMOS, and a rich set of modular passive devices. Intended for a wide variety of supply voltages, the technology, features three different performance NPNs and standard, dual oxide, zero V t , and junction isolated FETs. Optimized for wireless and mixed signal applications, BiCMOS 8WL will enable system on a chip integration for 3G cellular applications.


bipolar/bicmos circuits and technology meeting | 2013

Study of mutual and self-thermal resistance in 90nm SiGe HBTs

Vibhor Jain; Bjorn Zetterlund; Peng Cheng; Renata Camillo-Castillo; John J. Pekarik; James W. Adkisson; Qizhi Liu; Peter B. Gray; Vikas K. Kaushal; Thomas Kessler; David L. Harame

Impact of mutual thermal coupling on the performance of a single 90nm SiGe heterojunction bipolar transistor (HBT) due to the presence of power dissipating elements like other HBTs in near vicinity is presented in this paper. Mutual thermal resistance (Rth,mutual) has been computed as a function of spacing between the single HBT and a ring of HBTs surrounding the device. HBT structural design variations including device layout schemes, metal wire stack connected to the emitter, deep trench (DT) depth and emitter to DT spacing, for reduced self thermal resistance (Rth), have been explored in this paper. An updated thermal resistance model accounting for the heat flow through the metal wiring stack connected to the emitter is also reported.


bipolar/bicmos circuits and technology meeting | 2013

Schottky Barrier Diodes in 90nm SiGe BiCMOS process operating near 2.0 THz cut-off frequency

Vibhor Jain; Peng Cheng; Blaine J. Gross; Renata Camillo-Castillo; John J. Pekarik; James W. Adkisson; Qizhi Liu; Peter B. Gray; Vikas K. Kaushal; David L. Harame; Adam W. Divergilio

High performance Schottky Barrier Diodes (SBDs) with cut-off frequency (fc) ~2.0 THz integrated into a 90nm SiGe BiCMOS technology for millimeter wave (mm-wave) applications are presented in this paper. To our knowledge, this is the highest reported fc for a SBD in a BiCMOS technology. The SBDs reported here have low reverse bias leakage with breakdown voltage of ~5V, and have been integrated in the base technology without the addition of any extra processing step. The affects of variation of critical process and device parameters - undoped silicon layer (n-epi) thickness, thermal cycle associated with deep-trench formation, cathode reach-through width, and anode area on device performance have also been investigated and are presented here.


bipolar/bicmos circuits and technology meeting | 2012

Co-integration of high-performance and high-breakdown SiGe HBTs in a BiCMOS technology

John J. Pekarik; James W. Adkisson; Renata Camillo-Castillo; Peng Cheng; Adam W. Divergilio; Peter B. Gray; Vibhor Jain; Vikas K. Kaushal; Marwan H. Khater; Qizhi Liu; David L. Harame

Having two, or more, transistors with different values of fT and BVCEO provides flexibility to circuit designers in making tradeoffs of power and performance. The process complexity and resulting cost of fabricating these transistors on the same wafer is another important factor. Three different approaches for co-integrating high-performance and high-breakdown SiGe npn HBTs with minimal process deviation are presented herein. The work features a high-performance HBT with fT × BVCEO product of 500GHz-V and a high-breakdown HBT with over 430GHz-V integrated on the same wafer with one-mask deviation.

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