Philip George Shephard

IBM POWER6 microprocessor physical design and design methodology

The IBM POWER6™ microprocessor is a 790 million-transistor chip that runs at a clock frequency of greater than 4 GHz. The complexity and size of the POWER6 microprocessor, together with its high operating frequency, present a number of significant challenges. This paper describes the physical design and design methodology of the POWER6 processor. Emphasis is placed on aspects of the design methodology, technology, clock distribution, integration, chip analysis, power and performance, random logic macro (RLM), and design data management processes that enabled the design to be completed and the project goals to be met.

Cost trade-offs of various design for test techniques

Test cost is becoming a major factor in todays complex chip designs. One approach to lower test cost is to have the product test, or help test, itself. There are a wide variety of Design-for-Test techniques that have been developed for this purpose. A number of these techniques are evaluated against various related cost issues.