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Dive into the research topics where Pramod Kumar Tiwari is active.

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Featured researches published by Pramod Kumar Tiwari.


Journal of Applied Physics | 2010

A two-dimensional analytical model for threshold voltage of short-channel triple-material double-gate metal-oxide-semiconductor field-effect transistors

Pramod Kumar Tiwari; Sarvesh Dubey; Manjeet Singh; S. Jit

A two-dimensional (2D) analytical model for the threshold voltage of fully depleted short-channel triple-material double-gate (DG) metal-oxide-semiconductor field-effect transistors (MOSFETs) is presented in this paper. The 2D Poisson’s equation has been solved with suitable boundary conditions by applying the parabolic potential approximation. The lightly doped channel has been taken to enhance the device performance in terms of higher carrier mobility and minimum dopant fluctuation. The improved hot carrier effects over the double-material DG MOSFETs have been demonstrated. Different length ratios of three channel regions related to different gate materials have been optimized to minimize short-channel effects. The effects of device parameters on the threshold voltage have also been discussed. The model results have been compared with the simulation data obtained by using the commercially available device simulation software ATLAS™.


multimedia signal processing | 2009

A 2D analytical model of the channel potential and threshold voltage of Double-Gate (DG) MOSFETs with vertical Gaussian doping profile

Pramod Kumar Tiwari; Surendra Kumar; Samarth Mittal; Vaibhav Srivastava; Utkarsh Pandey; S. Jit

The paper presents a 2D analytical model for the potential function and threshold voltage of symmetric Double-Gate (DG) MOSFETs with vertical Gaussian doping profile in the channel.


Journal of Applied Physics | 2010

A two-dimensional model for the potential distribution and threshold voltage of short-channel double-gate metal-oxide-semiconductor field-effect transistors with a vertical Gaussian-like doping profile

Sarvesh Dubey; Pramod Kumar Tiwari; S. Jit

A two-dimensional (2D) model for the threshold voltage of the short-channel double-gate (DG) metal-oxide-semiconductor field-effect transistors (MOSFETs) with a vertical Gaussian-like doping profile is proposed in this paper. The evanescent mode analysis has been used to solve the 2D Poisson’s equation to obtain the channel potential function of the device. The minimum surface potential has been used to model the threshold voltage of the DG MOSFETs. Threshold voltage variations against channel length for different device parameters have been demonstrated. The validity of the proposed model is shown by comparing the results with the numerical simulation data obtained by using the commercially available ATLAS™, a 2D device simulator from SILVACO.


IEEE Transactions on Nanotechnology | 2013

An Analytical Threshold Voltage Model for Triple-Material Cylindrical Gate-All-Around (TM-CGAA) MOSFETs

Sarvesh Dubey; Abirmoya Santra; Gopikrishna Saramekala; Mirgender Kumar; Pramod Kumar Tiwari

In this paper, an analytical threshold voltage model is proposed for a triple-material cylindrical gate-all-around MOSFET considering parabolic approximation of the potential along the radial axis. The center (axial) and the surface potential models are obtained by solving the 2-D Poissons equation in the cylindrical coordinate system. This paper refutes the estimation of the natural length using surface potential as in previous work and proposes the use of center-potential-based natural length formulation for an accurate subthreshold analysis. The developed center potential model is used further to formulate the threshold voltage model and also extract drain-induced barrier lowering (DIBL) from the same. The effects of the device parameters like the cylinder diameter, oxide thickness, gate length ratio, etc., on the threshold voltage and DIBL are also studied in this paper. The model is verified by the simulations obtained from 3D numerical device simulator Sentaurus from Synopsys.


Journal of Semiconductor Technology and Science | 2010

A Subthreshold Swing Model for Symmetric Double- Gate (DG) MOSFETs with Vertical Gaussian Doping

Pramod Kumar Tiwari; S. Jit

An analytical subthreshold swing model is presented for symmetric double-gate (DG) MOSFETs with Gaussian doping profile in vertical direction. The model is based on the effective conduction path effect (ECPE) concept of uniformly doped symmetric DG MOSFETs. The effect of channel doping on the subthreshold swing characteristics for non-uniformly doped device has been investigated. The model also includes the effect of various device parameters on the subthreshold swing characteristics of DG MOSFETs. The proposed model has been validated by comparing the analytical results with numerical simulation data obtained by using the commercially available ATLAS™ device simulator. The model is believed to provide a better physical insight and understanding of DG MOSFET devices operating in the subthreshold regime.


Journal of Semiconductors | 2013

On-current modeling of short-channel double-gate (DG) MOSFETs with a vertical Gaussian-like doping profile

Sarvesh Dubey; Pramod Kumar Tiwari; S. Jit

An analytic drain current model is presented for doped short-channel double-gate MOSFETs with a Gaussian-like doping profile in the vertical direction of the channel. The present model is valid in linear and saturation regions of device operation. The drain current variation with various device parameters has been demonstrated. The model is made more physical by incorporating the channel length modulation effect. Parameters like transconductance and drain conductance that are important in assessing the analog performance of the device have also been formulated. The model results are validated by numerical simulation results obtained by using the commercially available ATLAS™, a two dimensional device simulator from SILVACO.


Journal of Applied Physics | 2011

A two-dimensional model for the subthreshold swing of short-channel double-gate metal–oxide–semiconductor field effect transistors with a vertical Gaussian-like doping profile

Sarvesh Dubey; Pramod Kumar Tiwari; S. Jit

An analytical two-dimensional (2D) model for the subthreshold swing of the short-channel double-gate (DG) MOSFET with a vertical Gaussian-like doping profile is presented in this paper. The 2D potential function obtained by solving the 2D Poisson’s equation by using the evanescent mode analysis has been used to formulate the subthreshold current. The concept of the effective conduction path effect of uniformly doped DG MOSFETs has been extended to the nonuniformly doped DG MOSFETs to obtain the subthreshold swing variations against doping profile parameters as well as device parameters of the present device. The results of the model show excellent matching with the numerical simulation data obtained by using the commercially available ATLASTM, a two-dimensional device simulator from SILVACO.


Journal of Semiconductor Technology and Science | 2013

An Analytical Model for the Threshold Voltage of Short-Channel Double-Material-Gate (DMG) MOSFETs with a Strained-Silicon (s-Si) Channel on Silicon-Germanium (SiGe) Substrates

Shiv Bhushan; Santunu Sarangi; S Gopi Krishna; Abirmoya Santra; Sarvesh Dubey; Pramod Kumar Tiwari

In this paper, an analytical threshold voltage model is developed for a short-channel double-material-gate (DMG) strained-silicon (s-Si) on silicon-germanium (Si 1-x Ge x ) MOSFET structure. The proposed threshold voltage model is based on the so called virtual-cathode potential formulation. The virtual-cathode potential is taken as minimum channel potential along the transverse direction of the channel and is derived from tow-dimensional (2D) potential distribution of channel region. The (2D) potential distribution of channel region. The 2D channel potential is formulated by solving the 2D Poissons equation with suitable boundary conditions in both the strained-Si layer and relaxed Si 1-x Ge x layer. The effects of a number of device parameters like the Ge mole fraction, Si film thickness and gate-length ratio have been considered on threshold voltage. Further, the drain induced barrier lowering (DIBL) has also been analyzed for gate-length ratio and amount of strain variations. The validity of the present 2D analytical model is verified with ATLAS TM , a 2D device simulator from Silvaco Inc.


Iet Circuits Devices & Systems | 2010

Modelling of doping-dependent subthreshold swing of symmetric double-gate MOSFETs

Pramod Kumar Tiwari; Chinmay R. Panda; Anupam Agarwal; Pratik Sharma; S. Jit

A simple, yet efficient two-dimensional (2D) model for the doping-dependent subthreshold swing characteristics of symmetric double-gate (DG) MOSFETs has been presented. The 2D Poissons equation has been solved by using parabolic potential approximation method to obtain the 2D channel potential function of the device. A closed-form expression for the doping-dependent effective current conducting path distance (deff) measured with respect to the centre of the channel of the symmetric DG MOSFET has been presented. Finally, the closed-form expression of the conducting path distance parameter deff has been utilised to obtain the subthreshold swing model of the device. The validity of the proposed model has been shown by comparing the analytical results with numerical simulation data obtained by using the commercially available ATLAS™ device simulator.


ieee india conference | 2014

A performance analysis of Hetero- Dielectric Dual-Material-Gate silicon-on-insulator tunnel field effect transistors (HD-DMG SOI TFETs)

Shara Mathew; Silpeeka Medhi; Pramod Kumar Tiwari

In this work, an investigation into the performance of Hetero-Dielectric Dual-Material-Gate SOI Tunnel FET (HD-DMG SOI TFET) by varying the work functions of both tunnel and auxiliary gates and analysing its influence on the transfer characteristics and the threshold voltage is done. With a suitable combination of work functions of both the tunnel and auxiliary gates, steeper Id-Vg variations and ION to IOFF ratio as high as 1.6×1011 has been achieved. It has also been found that using a high K dielectric near the tunnel junction and low K dielectric near the drain junction enhances the tunneling ON current. A comparison of electrical characteristics of HD-DMG-SOI TFET with that of Single Dielectric Dual Material Gate SOI Tunnel FET (SD-DMG SOI TFET) is also presented.

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S. Jit

Indian Institute of Technology (BHU) Varanasi

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Sarvesh Dubey

Memorial University of Newfoundland

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Arun Kumar

Indian Institute of Technology Patna

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Deepti Gola

Indian Institute of Technology (BHU) Varanasi

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Balraj Singh

Indian Institute of Technology (BHU) Varanasi

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Kunal Singh

Indian Institute of Technology (BHU) Varanasi

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Shiv Bhushan

National Institute of Technology

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Anupam Agarwal

Banaras Hindu University

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Ekta Goel

Indian Institute of Technology (BHU) Varanasi

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