S. Jit

A two-dimensional analytical model for threshold voltage of short-channel triple-material double-gate metal-oxide-semiconductor field-effect transistors

A two-dimensional (2D) analytical model for the threshold voltage of fully depleted short-channel triple-material double-gate (DG) metal-oxide-semiconductor field-effect transistors (MOSFETs) is presented in this paper. The 2D Poisson’s equation has been solved with suitable boundary conditions by applying the parabolic potential approximation. The lightly doped channel has been taken to enhance the device performance in terms of higher carrier mobility and minimum dopant fluctuation. The improved hot carrier effects over the double-material DG MOSFETs have been demonstrated. Different length ratios of three channel regions related to different gate materials have been optimized to minimize short-channel effects. The effects of device parameters on the threshold voltage have also been discussed. The model results have been compared with the simulation data obtained by using the commercially available device simulation software ATLAS™.

A 2D analytical model of the channel potential and threshold voltage of Double-Gate (DG) MOSFETs with vertical Gaussian doping profile

The paper presents a 2D analytical model for the potential function and threshold voltage of symmetric Double-Gate (DG) MOSFETs with vertical Gaussian doping profile in the channel.

A new 2-D model for the potential distribution and threshold voltage of fully depleted short-channel Si-SOI MESFETs

A new two-dimensional (2-D) analytical model for the threshold voltage of a fully depleted short-channel Si-MESFETs fabricated on the silicon-on-insulator (SOI) has been presented in this paper. The 2-D potential distribution functions in the active layer of the device is approximated as a parabolic function and the 2-D Poissons equation has been solved with suitable boundary conditions to obtain the bottom potential at the Si/oxide layer interface. The calculations have been carried out for both uniform and nonuniform doping profiles in two dimensions. The minimum bottom potential is used to monitor the drain-induced barrier lowering effect and consequently an analytical expression for the threshold voltage of the device has been derived. The numerical results for the bottom potential and threshold voltage considering a wide range of device parameters have also been presented. The model has been compared with the simulated results obtained by using the ATLAS Device Simulation Software to show the validity of the proposed model. For uniform doping profile, the numerical results have also been compared with the reported data in the literature and a good agreement is observed among the three. The proposed model is simple and easy to understand the behavior of the fully depleted short-channel SOI-MESFETs as compared to the other models reported in the literature.

A two-dimensional model for the potential distribution and threshold voltage of short-channel double-gate metal-oxide-semiconductor field-effect transistors with a vertical Gaussian-like doping profile

A two-dimensional (2D) model for the threshold voltage of the short-channel double-gate (DG) metal-oxide-semiconductor field-effect transistors (MOSFETs) with a vertical Gaussian-like doping profile is proposed in this paper. The evanescent mode analysis has been used to solve the 2D Poisson’s equation to obtain the channel potential function of the device. The minimum surface potential has been used to model the threshold voltage of the DG MOSFETs. Threshold voltage variations against channel length for different device parameters have been demonstrated. The validity of the proposed model is shown by comparing the results with the numerical simulation data obtained by using the commercially available ATLAS™, a 2D device simulator from SILVACO.

Sol-Gel-Based Highly Sensitive Pd/n-ZnO Thin Film/n-Si Schottky Ultraviolet Photodiodes

High-performance ultraviolet (UV) Schottky photodiodes obtained by growing Pd Schottky contacts on the sol-gel-derived n-ZnO thin films deposited on n-Si substrates have been reported in this paper. The current-voltage (I-V) measurements of the as-fabricated Schottky photodiodes show an excellent room temperature contrast ratio (i.e., the ratio of the current under UV illumination to the dark current) of ~5.332 × 103 and responsivity (i.e., the parameter characterizing the sensitivity of the device to the UV light) of ~8.39 A/W at -5 V reverse bias voltage, respectively; when the device is illuminated by an UV source of ~650 μW output power at ~ 365 nm. The measured room temperature contrast ratio and responsivity are believed to be the highest among the reported values in the literature for ZnO thin film-based Schottky photodiodes using sol-gel method.

A new optoelectronic integrated device for light-amplifying optical switch (LAOS)

A new optoelectronic integrated device is proposed for a light-amplifying optical switch (LAOS). The device is composed of an optical field-effect transistor (OPFET) in series with a light source which may be either a double heterostructure light-emitting diode (LED) or laser diode (LD). A quantitative circuit model for the proposed LAOS is presented and theoretical investigation is carried out for developing a current-voltage (I-V) relation for the device. It is shown analytically that switching action takes place from a low current state to a high current state through a region of negative differential resistance (NDR) when a voltage greater than the breakover voltage is applied.

Ultraviolet Photodetection Properties of ZnO/Si Heterojunction Diodes Fabricated by ALD Technique Without Using a Buffer Layer

The fabrication and characterization of a Si/ZnO thin film heterojunction ultraviolet photodiode has been presented in this paper. ZnO thin film of ~100 nm thick was deposited on Silicon (Si) wafer by atomic layer deposition (ALD) technique. The Photoluminescence spectroscopy confirms that as-deposited ZnO thin film has excellent visible-blind UV response with almost no defects in the visible region. The room temperature current-voltage characteristics of the n-ZnO thin film/p-Si photodiodes are measured under an UV illumination of 650 <W at 365 nm in the applied voltage range of ±2V. The current-voltage characteristics demonstrate an excellent UV photoresponse of the device in its reverse bias operation with a contrast ratio of ~ 1115 and responsivity of ~0.075 A/W at 2 V reverse bias voltage.

Mean Barrier Height and Richardson Constant for Pd/ZnO Thin Film-Based Schottky Diodes Grown on n-Si Substrates by Thermal Evaporation Method

This letter reports the temperature-dependent electrical parameters of Pd/n-ZnO thin film-based Schottky diodes grown on n-Si substrates by thermal evaporation method. The parameters have been investigated by considering a Gaussian distributed barrier height across the Pd/n-ZnO interface with a standard deviation σ₀ around a mean barrier height qφB,m. As compared with the reported results, the estimated values of the Richardson constant (~19.54Acm^-2K^-2) and mean barrier height (~1.41 eV) are much closer to their theoretically predicted values of 32Acm^-2K^-2 (for m_e*=0.27 m0) and 1.42 eV (for work function of Pd = 5.12 eV and electron affinity of ZnO = 3.7 eV), respectively.

2-D Analytical Modeling of Threshold Voltage for Graded-Channel Dual-Material Double-Gate MOSFETs

A 2-D analytical model for the surface potential and threshold voltage of graded-channel dual-material double-gate (GCDMDG) MOSFETs obtained by intermixing the concepts of graded doping in channel and dual material in gate engineering has been proposed. The parabolic approximation method has been explored for determining the potential distribution function of the device by solving Poissons equation with suitable boundary conditions. The threshold voltage roll-off, drain-induced barrier lowering and lateral electric field have also been examined. The effects of different device parameters on device performance have been evaluated to check its figure-of-merit over the graded-channel double-gate (GCDG) and dual-material double-gate (DMDG) structures. For validation of the proposed model, the results have been compared with the numerical simulation data obtained by ATLAS™, a 2-D device simulator from SILVACO.

Analysis of Temperature-Dependent Electrical Characteristics of n-ZnO Nanowires (NWs)/p-Si Heterojunction Diodes

This paper presents the electrical characteristics of n-zinc oxide (ZnO) nanowires (NWs)/p-Si (100) heterojunction diodes fabricated by the oxidation of thermally deposited metallic Zn on Al:ZnO-coated p-Si 〈1 0 0〉 substrates. The electrical parameters of the n-ZnO NWs/p-Si diodes have been estimated by using the room temperature capacitance-voltage (C-V) and temperature-dependent current-voltage (I-V) characteristics of the heterojunction. The carrier concentration of the ZnO NW film and the barrier height of the diode estimated from the C-V characteristics at room temperature are 1.54 × 10 15 cm -3 and 0.75 eV, respectively. The thermionic emission model was used to analyze the temperature-dependent measured I-V characteristics to estimate the parameters of the diode. The estimated values of the barrier height and ideality factor at room temperature were 0.715 eV and 2.13, respectively. The spatial barrier inhomogeneity was included in the aforementioned analysis by assuming a Gaussian distribution for the barrier height at the n-ZnO NWs/p-Si heterojunction. The Richardson constant A* of ZnO was found to be increased from a relatively low value of 9.75 ×10 - 8 A ·cm - 2 ·K - 2 to a more realistic value of 49A ·cm - 2 ·K - 2 after incorporating the barrier inhomogeneity phenomenon in the aforementioned analysis.