Pritha Banerjee

3-D Analytical Modeling of Dual-Material Triple-Gate Silicon-on-Nothing MOSFET

A 3-D analytical model of a new structure, namely, dual-material triple-gate silicon-on-nothing MOSFET is proposed in this paper. 3-D Poisson’s equation with proper boundary conditions was solved to obtain the surface potential variation of the structure considering the popular parabolic potential approximation, and the threshold voltage and electric field were calculated for the model. The proposed model’s immunity to the various short-channel effects, such as threshold voltage roll-off, Drain-Induced Barrier Lowering (DIBL), and subthreshold swing, are also examined, and the impact of the various device parameters on the performance of the device is studied. The 3-D simulated results obtained using ATLAS, a device simulator from Silvaco, validate the analytical results obtained for this structure.

Exploring the short channel characteristics and performance analysis of DMDG SON MOSFET

Abstract A two-dimensional (2-D) analytical model for dual-material double gate (DMDG) Silicon-on-Nothing (SON) MOSFETs is developed to study the effect of variation of both the surface potential and threshold voltage on short channel effects (SCEs). Two dimensional (2-D) Poissons equation with proper boundary conditions has been solved considering the parabolic potential approximation. The model includes the calculations of threshold voltage, electric field and subthreshold swing. The impact of variation of the device parameters such as gate length ratios, gate metal work functions on the performance of the device has been examined and the results are compared to that of dual-material double gate (DMDG) Silicon-on-Insulator (SOI) MOSFETs. The calculated results obtained have been validated with the numerical simulation data obtained from ATLAS, a 2-D device simulator from SILVACO.

Modeling and Analysis of a Front High-k gate stack Dual-Material Tri-gate Schottky Barrier Silicon-on-Insulator MOSFET with a Dual-Material Bottom Gate

The present work centralizes the analytical modeling of a novel structure namely front high-k gate stack Dual-Material Tri-gate Silicon-on-insulator Schottky barrier MOSFET with a dual material bottom gate along with an emphasis on its response towards the various SCEs. 3-D Poisson’s equation along with proper boundary conditions has been solved considering the popular parabolic potential approximation. Different device features like surface potential, threshold voltage, electric field has been studied. Also the device immunity towards the several Short channel effects like drain-induced barrier lowering, threshold voltage roll-off, hot carrier effects are investigated minutely. The analytical results obtained have been verified using simulation results obtained from ATLAS.

Performance Analysis of a Front High-K Gate Stack Dual-Material Tri-gate SON MOSFET

This present work encompasses the analytical modeling of a front high-K gate stack dual-material tri-gate SON MOSFET. By solving the three-dimensional Poisson’s equation, the expression for surface potential of the proposed device is obtained. In addition, the electric field of the device is also calculated. The results obtained are compared with the model’s single-metal counterpart. The extent of agreement between the analytical results and simulated results obtained from a 3-D device simulator, namely Atlas, Silvaco, is quite good that validates our proposed model.

Analytical Modeling of Triple-Metal Hetero-Dielectric DG SON TFET

In this paper, a 2-D analytical model of triple-metal hetero-dielectric DG TFET is presented by combining the concepts of triple material gate engineering and hetero-dielectric engineering. Three metals with different work functions are used as both front- and back gate electrodes to modulate the barrier at source/channel and channel/drain interface. In addition to this, front gate dielectric consists of high-K HfO2 at source end and low-K SiO2 at drain side, whereas back gate dielectric is replaced by air to further improve the ON current of the device. Surface potential and electric field of the proposed device are formulated solving 2-D Poisson’s equation and Young’s approximation. Based on this electric field expression, tunneling current is obtained by using Kane’s model. Several device parameters are varied to examine the behavior of the proposed device. The analytical model is validated with TCAD simulation results for proving the accuracy of our proposed model.

Exploring the Short-Channel Characteristics of Asymmetric Junctionless Double-Gate Silicon-on-Nothing MOSFET

AbstractThis paper presents an analytical model of an asymmetric junctionless double-gate (asymmetric DGJL) silicon-on-nothing metal-oxide-semiconductor field-effect transistor (MOSFET). Solving the 2-D Poisson’s equation, the expressions for center potential and threshold voltage are calculated. In addition, the response of the device toward the various short-channel effects like hot carrier effect, drain-induced barrier lowering and threshold voltage roll-off has also been examined along with subthreshold swing and drain current characteristics. Performance analysis of the present model is also demonstrated by comparing its short-channel behavior with conventional DGJL MOSFET. The effect of variation of the device features due to the variation of device parameters is also studied. The simulated results obtained using 2D device simulator, namely ATLAS, are in good agreement with the analytical results, hence validating our derived model.

Analytical modelling and performance analysis of gate engineered TG silicon-on-nothing metal–oxide–semiconductor field-effect transistor

This study presents a three-dimensional (3D) analytical model of triple material tri-gate silicon-on-nothing metal–oxide–semiconductor field-effect transistor. The performance of the device by varying the different device parameters as well as the devices immunity toward the various short channel effects such as Drain-induced barrier lowering (DIBL), hot carrier effect, threshold-voltage roll-off and subthreshold swing are investigated. The 3D Poissons equation with appropriate boundary conditions is solved considering the parabolic potential approximation method to obtain the surface potential distribution. In addition, the calculations for threshold voltage and electric field are also done and the results obtained are verified using a 3D device simulator, namely ATLAS from SILVACO.

3-D analytical modeling of gate engineered tri-gate SON MOSFET

This paper presents a 3-D analytical modeling of Gate engineered tri-gate Silicon-On-Nothing (SON) MOSFET. Solving the 3-D Poissons equation, surface potential distribution of the device is obtained. In addition, results for threshold voltage and electric field of the device are also shown. Moreover response of the proposed device towards the various Short channel effects like Hot carrier effect, threshold voltage roll-off has been examined. Analytical results are validated using the simulation results as obtained from ATLAS, a 3-D device simulator from SILVACO.