Purakh Raj Verma

ESD Engineering Fully Silicided Large MOSFET Driver for Maximum

Simultaneous optimization of LDD and antipunch-through implant conditions for ESD performance of very large width silicided output driver NMOSFET without snapback mode of operation is reported. Physical mechanisms responsible for performance improvement and device sensitivity to pulse rise time, with little or no dependence on TLP pulsewidth, are detailed.

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Third-order intermodulation intercept (IP3) of 90 dBm required for uplink carrier aggregation in LTE systems drives technology, modeling, design and characterization methods for Front-End semiconductor technology. For the first time, direct on-wafer switch branch IP3 of 84 dBm on trap-rich RF silicon on insulator (RFSOI) is demonstrated. Exploiting widely available low passive intermodulation (PIM) techniques, intermodulation distortion of switch branches and transmission lines is easily obtained to 10 Watts RF input power. On-wafer measurement system IP3 of 98 dBm gives visibility beyond harmonic distortion to the critical product level requirement of IP3.

Performance

CMOS Silicon on Insulator (SOI) is now the technology of choice for RF switches in front end module systems. The emergence of 4G cellular systems with carrier aggregation has made the design of front end modules more complex. To take into account the diversity paths now required in cellular systems the low noise amplifiers (LNAss) are being integrated in the front end module along with the switches. This paper describes novel low noise amplifier devices in high resistivity SOI targeted for integration and use in RF front end modules.

Switch branch in trap-rich RFSOI with 84 dBm off-state IP3

A new kind of field plate as contact field plate is fabricated for hot carrier injection improvement, significant decrease in the specified on resistance degradation is observed without substantially affecting the breakdown voltage of devices. Charge pumping method and simulation are carried out to study the degradation mechanism. Our results clearly show that the application of contact field plate can improve the device robustness in terms of hot carrier injection.

A Novel device for low noise amplification in 130nm high resistivity RFSOI technology platform

In this paper, various kinds of n-Drain Extended MOS with contact field plate are investigated. Improved on-resistance degradation is observed for all the kinds of contact field plates. Technology Computer-Aided-Design simulation reveals that the impact ionization rate in the drift region is decreased for all kinds of contact field plates.

A novel contact field plate application in drain-extended-MOSFET transistors

Landscape of semiconductor technologies and manufacturing has been changing in general and RF technologies in specific from IDMs to foundries and from exotic III-V compounds to the silicon. Tremendous advantage of RF performance from nanometer technologies, exponential increase in scalability, availability of high resistivity and engineered SOI substrates have opened doors for the convergence of all sorts of RF applications to silicon based RF technologies. Wafer foundries having been in the leading position of silicon based technologies are going to be benefited with this convergence and all design houses will have access to the same with minimal investments. This paper talks about the three major forces which are helping to converge all consumer RF application integrated circuits to total silicon based solutions with minimum form factor.