Guan Huei See

Surface-Potential Solution for Generic Undoped MOSFETs With Two Gates

We present a rigorously derived analytical Poisson solution for undoped semiconductors and apply the general solution to generic MOSFETs with two gates, unifying different types such as silicon-on-insulator (SOI) and symmetric and asymmetric double gate (s-DG and a-DG) structures. The Newton-Raphson method is used to solve surface-potential equations resulting from the application of boundary conditions to the general Poisson solution, with an initial guess that is very close to the exact solution. The universal initial guess can be used as an approximate explicit solution for fast evaluation, while the iterative solution can be used for benchmark tests. The results demonstrate the unification of surface-potential solutions having an accuracy of 10-15 V for SOI, a-DG, and s-DG MOSFETs, which are achieved within two to six iterations. Furthermore, the explicit solution yields less than 3.5% error for back-to-front-gate oxide thickness ratios larger than 25

Rigorous Surface-Potential Solution for Undoped Symmetric Double-Gate MOSFETs Considering Both Electrons and Holes at Quasi NonEquilibrium

This paper presents a rigorously-derived analytical solution of the Poisson equation with both electrons and holes in pure silicon, which is applied to the analysis of undoped symmetric double-gate transistors. An implicit surface-potential equation is obtained that can be solved by a second-order Newton-Raphson technique along with an appropriate initial guess. Within the assumption of holes at equilibrium that is being used in the existing literature, the new results, when compared with the models based on one carrier, reveal that missing the other carrier in the formulation results in a singularity in the gate capacitance exactly at flatband, which may give trouble for high-frequency analysis, although the errors in surface potentials are below the nano-volt range for all gate voltages. However, the solution without assuming constant hole imref, as presented in this paper for the first time, further pinpoints the inadequacy in existing theories of surface-potential solutions in double-gate MOSFETs with undoped thin bodies, although its application to transport solutions of terminal current/charge models depends highly on the type of source/drain structures and contacts.

A Compact Model for Undoped Silicon-Nanowire MOSFETs With Schottky-Barrier Source/Drain

A comprehensive physics-based compact model for three-terminal undoped Schottky-barrier (SB) gate-all-around silicon-nanowire MOSFETs is formulated based on a quasi-2-D surface-potential solution and the Miller-Good tunneling model. The energy-band model has accounted for the screening of the gate field by the electrons or holes, which has been largely missed in the literature. Although SB-MOSFETs are essentially ambipolar devices, we show that the separate modeling of electron and hole currents is simple yet accurately predicts the final ambipolar current. Thinner oxide thickness is confirmed to be beneficial to SB-MOSFETs for both ON - and OFF-state currents. However, smaller nanowire radius (or thinner body thickness) is found to be only beneficial to SB-MOSFETs with high SB heights (SBHs) despite the OFF-state current being reduced significantly. For SB-MOSFETs with low SBHs, the tunneling-current-density enhancement due to a smaller radius is not able to compensate the reduction in the contact size, which leads to a degradation of the ldquoONrdquo current. The drift current in the channel is shown to be negligible in SB-MOSFETs, and the tunneling/thermionic current through the SB represents the main current-limiting mechanism.

A Compact Model Satisfying Gummel Symmetry in Higher Order Derivatives and Applicable to Asymmetric MOSFETs

This paper presents a new concept for the MOSFET saturation voltages at the drain and source sides referenced to bulk, and applies them to the popularly used smoothing functions for the effective drain-source voltage (Vds,eff ). The proposed model not only builds in physically all the terminal-bias variations, but is also extended to include source/drain asymmetry in real devices in a single-core compact model. The new model resolves a key bottleneck in existing models for passing the Gummel symmetry test (GST) in higher order derivatives, which has to be traded off for the geometry-dependent Vds,eff smoothing parameter. The complete drain-current model, including the effects of velocity saturation and overshoot as well as source/drain series resistance, has also been reformulated with the same ldquobulk-referencingrdquo concept. It is shown that the proposed model passes the GST in all higher order derivatives without any constraint on the value of the smoothing parameter. It also demonstrates potential extension to modeling asymmetric MOSFETs, which is becoming an important model capability.

“Ground-Referenced” Model for Three-Terminal Symmetric Double-Gate MOSFETs With Source/Drain Symmetry

This brief presents for the first time a ldquoground-referencedrdquo model to satisfy the Gummel symmetry test in three-terminal MOSFETs without body contact. Unlike four-terminal bulk MOSFETs, in which the bulk Fermi potential is set by the body voltage, a paradigm change is needed to model the respective electron and hole imrefs referenced to the ground rather than to model the imref-split referenced to the source. Together with the model consistency requirement for any reference voltages, the proposed formulations, as illustrated with undoped symmetric double-gate MOSFETs, provide a guide for formulating compact models with source/drain (S/D) symmetry, which can also be easily extended to model unintentional or intentional S/D asymmetry.

Explicit compact surface-potential and drain-current models for generic asymmetric double-gate metal-oxide-semiconductor field-effect transistors

In this paper, explicit surface potentials for undoped asymmetric-double-gate (a-DG) metal–oxide–semiconductor field-effect transistors (MOSFETs) suitable for compact model development are presented for the first time. The model is physically derived from Poissons equation in each region of operation and adopted in a unified regional approach. The proposed model is physically scalable with oxide/channel thicknesses and has been verified with generic implicit solutions for independent gate biases as well as for different gate/oxide materials. The model is extendable to silicon-on-insulator (SOI) and symmetric-DG (s-DG) MOSFETs. Finally, a continuous, explicit drain-current equation has been derived on the basis of the developed explicit surface-potential solutions.

Subcircuit Compact Model for Dopant-Segregated Schottky Gate-All-Around Si-Nanowire MOSFETs

In this paper, we demonstrate analytical device models and a unique subcircuit approach to physically and accurately model the dopant-segregated Schottky (DSS) gate-all-around (GAA) Si-nanowire (SiNW) MOSFETs. The direct current characteristics of the DSS GAA SiNW MOSFETs are investigated through numerical simulations and fabricated devices. Transport mechanisms are studied and explained with numerical devices from ambipolar thermionic tunneling to unipolar drift-diffusion and a combination of both as the dopant segregation doping and thickness are varied. The convex curvature in the Ids- Vds characteristics is accurately reproduced by the subcircuit compact model, and it is shown for the first time that such a unique gds-Vds characteristic in DSS devices is only feasible to be modeled by the subcircuit approach.

Single-piece polycrystalline silicon accumulation/depletion/inversion model with implicit/explicit surface-potential solutions

A single-piece analytical equation for the surface potential at the polycrystalline-silicon (poly-Si) gate of a metal-oxide-semiconductor field-effect transistor is presented, which accounts for the poly-accumulation, poly-depletion, and poly-inversion effects. It is shown that the model accurately describes the physical behavior of the surface potentials, gate charge, and capacitance, with smooth transitions, which has been verified with iterative, explicit, and numerical solutions. The proposed model can be used in implicit or explicit surface-potential-based formulations.

A compact model for undoped symmetric double-gate MOSFETs with Schottky-barrier source/drain

A physics-based compact model for undoped symmetric double-gate MOSFETs with Schottky-barrier source and drain is formulated based on the quasi-2D surface-potential solution and Miller-Good tunneling method. Essential physics due to the screening of the gate field by free carriers, which is absent in previous literatures, is included in the model. Electron and hole transports for all positive/negative gate/drain biases are modeled within the single-piece core model that scales with device geometry, body/oxide thickness, SB workfunction, and source/drain contact size. Unlike 2D numerical simulation, the proposed compact model, which is simple and fast yet accurate, is circuit-compatible and suitable for future VLSI circuit design using SB-MOS devices. The proposed modeling methodology can be easily extended to handle other promising devices such as SB silicon nanowires.

A rigorous surface-potential-based I-V model for undoped cylindrical nanowire MOSFETs

A non-charge-sheet surface-potential-based compact drain-current model for long-channel undoped gate-all-around (GAA) silicon-nanowire (SiNW) MOSFETs is developed. The surface-potential equation is derived from cylindrical Poisson equation for undoped silicon and solved iteratively with a very good initial guess to reach equation residue below 10-16 V within a few iterations. The single-piece current equation is derived and validated with numerical simulations for all operation regions without any fitting parameters. The results show that the proposed model can be used for bench-marking long-channel SiNW models, and demonstrate a first step towards a practical SiNW model for inclusion of various short-channel and quantum-mechanical effects.