Qianghua Xie

Effect of oxidation on charge localization and transport in a single layer of silicon nanocrystals

The effect of oxidation on charge transport and retention within a sheet of silicon (Si) nanocrystals was investigated with an electrostatic force microscope. Single layers of nanocrystals with smooth and abrupt Si/SiO2 interfaces were prepared by thermal crystallization of thin amorphous Si layers, followed by an oxidation treatment for isolating the nanocrystals. Controlled amounts of charge were injected into the nanocrystals and their in-plane diffusion was monitored in real time. Rapid transport of the injected charge occurred for the nonoxidized nanocrystals. Oxidation of the nanocrystal layer resulted in suppression of lateral transport. The nanocrystals oxidized for 30 min retained the injected charge in a well-defined, localized region with retention times of the order of several days. These long-term charge retention characteristics indicate that nanocrystals prepared by this process could be attractive candidates for nonvolatile memory applications.

Two-dimensional ultrashallow junction characterization of metal-oxide-semiconductor field effect transistors with strained silicon

Strained Si has been realized as one of the most promising candidates of next generation complementary metal-oxide-semiconductor technology. Since the carrier mobility can be significantly increased with strained Si lattice, the device speed can be further increased without reducing the critical dimensions. However, ultrashallow junction engineering becomes more challenging due to much complicated dopant diffusion behavior. We have used scanning capacitance microscopy and dopant selective etching to characterize such differences by comparing the devices fabricated with strained Si channel and with conventional unstrained Si. The devices we used are p-type channel complementary metal-oxide-semiconductor field effect transistors fabricated with 130 nm technology, with strained Si channel built on SiGe pseudosubstrate. Significant differences were observed in the formation of source/drain (S/D) extensions. The junction profile shows abrupt transition from S/D extension to S/D comparing with unstrained Si. Me...

Mechanical Properties and Porosity of Organo-Silicate Glass (OSG) Low-k Dielectric Films

Low-k material integration issues that plague the microelectronics industry include the compromise in mechanical properties that one incurs in abandoning fully dense silica dieletrics. Typical elastic moduli of OSG low-k dieletric films are 2-10 GPa with corresponding hardnesses of 0.5 to 1.5 GPa. In the present study, the hardness and elastic modulus properties measured by nanoindentation of porous silica based low-k films are correlated with in initial estimates of density using a novel technique of spectroscopic ellispsometry. Transmission electron microscopy and X-ray photoelectron spectroscopy show the structural and chemical similarity of the films. Nanoindentation and spectroscopic ellipsometry results reflect significant deviations in material behavior from that expected from a simple model of silica (SiO 2 ) with included voids or porosity, suggesting that the methyl groups are actively participating in the mechanical and optical properties of the material.

Characterization Techniques for Evaluating Strained Si CMOS Materials

The electron and hole mobility of Si complementary metal on oxide field effect transistors (CMOS) can be enhanced by introducing a biaxial tensile stress in the Si channel. This paper outlines several key analytical techniques needed to investigate such layers. Raman scattering is used to measure the strain in the Si channel as well as to map the spatial distribution of strain in Si at a lateral resolution better than 0.5 μm. Atomic force microscopy (AFM) is used to measure the surface roughness. Transmission electron microscopy (TEM) is used to reveal dislocations in the structure, the nature of the dislocations and the propagation of the dislocations. Secondary ion mass spectrometry (SIMS) is used to monitor the Ge content profile in the structure and the thickness of each layer. In the long term, inline nondestructive techniques are desired for epi‐monitoring in manufacturing. Two techniques, spectroscopic ellipsometry (SE) and x‐ray reflectivity (XRR), have shown promise at this stage.

Root‐Cause Analysis and Statistical Process Control of Epilayers for SiGe:C Hetero‐Structure Bipolar Transistors

The SiGe:C hetero‐structure bipolar transistor (HBT) has turned into a key technology for wireless communication. This paper describes various critical analytical techniques to bring up and maintain the SiGe:C epi‐process. Two types of analysis are critical, (1) routine monitoring SiGe base and Si cap thickness, doping dose, Ge composition profile, and their uniformity across the wafer; and (2) root‐cause analysis on problems due to non‐optimized process and variation in process conditions. A transmission electron microscopy (TEM) technique has been developed allowing a thickness measurement with a reproducibility better than 3 A. Charge‐compensated low‐energy secondary ion mass spectrometry (SIMS) using optical conductivity enhancement (OCE) allows a Ge composition measurement to a required precision of 0.5 at. %.

Periodic Two-dimensional Arrays of Silicon Quantum Dots for Nanoscale Device Applications

We report a successful unification of standard lithographic approaches (top down), anisotropic etching of atomically smooth surfaces, and controlled crystallization of silicon quantum dots (bottom up) to produce silicon nanoclusters at desired locations. These results complement our previous demonstration of silicon nanocrystal uniformity in size, shape, and crystalline orientation in nanocrystalline silicon (nc-Si)/SiO 2 superlattices, and could lead to practical applications of silicon nanocrystals in electronic devices. The goal of this study was to induce silicon nanocrystal nucleation at specific lateral sites in a continuous amorphous silicon (a-Si) film. Nearly all previous studies of silicon nanocrystals are based on films containing isolated nanocrystals with random lateral position and spacing. The ability to define precise two-dimensional arrays of quantum dots would allow each quantum dot to be contacted using standard photolithographic techniques, leading to practical device applications like high-density memories. In this work, a template substrate consisting of an array of pyramid-shaped holes in a (100) silicon wafer was formed using standard microfabrication techniques. The geometry of this substrate then influenced the crystallization of an a-Si/SiO 2 superlattice that was deposited on it, resulting in preferential nucleation of silicon nanoclusters near the bottom of the pyramid holes. These clusters are clearly visible in transmission electron microscopy (TEM) images, while no clusters have been observed on the planar surface areas of the template. Possible explanations for this selective nucleation and future device structures will be discussed.

2D Dopant Profiling for Advanced Process Control

As the CMOS device dimensions continue to shrink, it is more and more critical to control the process parameters during mass production of advanced VLSI chips in order to achieve high yield and profitability. 2D dopant characterization is one of the critical techniques to resolve manufacturing excursions. A quick access to dopant distribution, especially precise delineation of p-n junction would readily provide critical information for many manufacturing issues, as well as device design and process development. Here we present our approaches to some of those issues with available techniques. The main techniques we used are dopant selective etching (DSE) and scanning probe microscopy based electrical measurements including scanning capacitance microscopy (SCM) and scanning spread resistance microscopy (SSRM). These techniques provided complementary results and showed strengths in solving different issues. We have successfully delineated junction of CMOS devices with 0.13 μm technology with source/drain extensions. Other applications, including diode leakage, well-well isolation, and buried layer delineation with the combination of these methods are presented.