R.A. Reber

Effects of oxide traps, interface traps, and ‘‘border traps’’ on metal‐oxide‐semiconductor devices

We have identified several features of the 1/f noise and radiation response of metal‐oxide‐semiconductor (MOS) devices that are difficult to explain with standard defect models. To address this issue, and in response to ambiguities in the literature, we have developed a revised nomenclature for defects in MOS devices that clearly distinguishes the language used to describe the physical location of defects from that used to describe their electrical response. In this nomenclature, ‘‘oxide traps’’ are simply defects in the SiO2 layer of the MOS structure, and ‘‘interface traps’’ are defects at the Si/SiO2 interface. Nothing is presumed about how either type of defect communicates with the underlying Si. Electrically, ‘‘fixed states’’ are defined as trap levels that do not communicate with the Si on the time scale of the measurements, but ‘‘switching states’’ can exchange charge with the Si. Fixed states presumably are oxide traps in most types of measurements, but switching states can either be interface tr...

Effect of bias on thermally stimulated current (TSC) in irradiated MOS devices

The electric-field dependence of thermally stimulated current (TSC) in irradiated MOS capacitors for TSC fields ranging from -3 MV/cm to +2 MV/cm was studied. TSC measurements at negative bias following positive-bias irradiation provide useful estimates of the net oxide-trap charge, Delta G/sub ot/, if the TSC bias is large enough to overcome trapped-hole space-charge effects. Very little TSC is observed for positive-bias irradiation. Under proper TSC bias conditions, TSC and C-V estimates of Delta G/sub ot/ agree well for thick, soft oxides, but differ significantly for thin, hard oxides. Differences between TSC and C-V estimates of Delta G/sub ot/ for thin, hard oxides are attributed to electron injection into the oxide and capture at trap sites associated with the radiation-induced trapped holes. It is shown that TSC measurements can provide insight into the location of hole traps in MOS oxides that cannot be obtained from standard C-V tests. >

The role of border traps in MOS high-temperature postirradiation annealing response

A very-long-term study of the response of nonradiation-hardened MOS transistors to elevated-temperature, postirradiation biased anneals has been performed. The midgap-voltage shift of these devices returns to approximately 0 V during a 2.75-year, +6 V 100 degrees C anneal, supporting the idea that in these devices interface traps and border traps (near-interfacial oxide traps which can exchange charge with the underlying Si) are charge-neutral at midgap. Subsequent switched-bias annealing reveals that a significant fraction of the radiation-induced trapped holes have not been removed from the device, but are compensated by electrons in border traps. These border traps can lead to large, reversible changes in midgap-voltage shifts and/or subthreshold stretchout during switched-bias anneals. Midgap-voltage and subthreshold-stretchout reversibility remains significant in these devices even after annealing at temperatures up to 350 degrees C. Similar reversibility in postirradiation response is observed for hardened transistors and capacitors. These results suggest that border traps may lead to increased reliability problems in some irradiated devices as compared to their unirradiated counterparts. >

BULK OXIDE TRAPS AND BORDER TRAPS IN METAL-OXIDE-SEMICONDUCTOR CAPACITORS

Thermally stimulated current (TSC) and capacitance–voltage measurements are combined via a newly developed analysis technique to estimate positive and negative oxide-trap charge densities for metal–oxide–semiconductor (MOS) capacitors exposed to ionizing radiation or subjected to high-field stress. Significantly greater hole trapping than electron trapping is observed in 3% borosilicate glass (BSG) insulators. Two prominent TSC peaks are observed in these BSG films. A high-temperature peak near 250 °C is attributed to the Eγ′ defect, which is a trivalent Si center in SiO2 associated with an O vacancy. A lower temperature positive charge center near 100 °C in these films is likely to be impurity related. The higher temperature Eγ′ peak is also observed in 10, 17, and 98 nm thermal oxides. A much weaker secondary peak is observed near ∼60 °C in some devices, which likely is due to metastably trapped holes in the bulk of the SiO2. Negative charge densities in these thermal oxides are primarily associated wit...

Effects of reliability screens on MOS charge trapping

The effects of pre-irradiation elevated-temperature bias stresses on the radiation hardness of field-oxide transistors have been investigated as a function of stress temperature, time, and bias. Both the stress temperature and time are found to have a significant impact on radiation-induced charge buildup in these transistors. Specifically, an increase in either the stress temperature or time causes a much larger negative shift (towards depletion) in the I-V characteristics of the n-channel field-oxide transistors. This increased shift in the transistor I-V characteristics with stress temperature and time suggests that the mechanisms responsible for the stress effects are thermally activated. An activation energy of /spl sim/0.38 eV was measured. The stress bias was found to have no impact on radiation-induced charge buildup in these transistors. The observed stress temperature, time, and bias dependencies appears to be consistent with the diffusion of molecular hydrogen during a given stress period. These results have important implications for the development of hardness assurance test methods.

Trapped‐hole annealing and electron trapping in metal‐oxide‐semiconductor devices

Thermally stimulated current‐ and capacitance‐voltage techniques are combined to provide the first quantitative estimates of the contributions of trapped‐hole annealing and electron trapping to oxide‐trap charge neutralization in metal‐oxide‐semiconductor devices. For 350‐nm nonradiation‐hardened oxides, trapped electrons compensate ∼15% of the radiation‐induced trapped positive charge after x‐ray irradiation (evidently forming dipolar defects), and ∼65% of the trapped positive charge remaining after positive‐bias annealing at 80 °C. For 45‐nm radiation‐hardened oxides, trapped electrons compensate ∼45% of the trapped positive charge after irradiation, and ∼70% after annealing. Implications for models of oxide‐trap‐charge buildup and annealing are discussed.

Thermally stimulated current in SiO2

Abstract Thermally stimulated current (TSC) techniques provide information about oxide-trap charge densities and energy distributions in MOS (metal-oxide-semiconductor) capacitors exposed to ionizing radiation or high-field stress that is difficult or impossible to obtain via standard capacitance–voltage or current–voltage techniques. The precision and reproducibility of measurements through repeated irradiation/TSC cycles on a single capacitor is demonstrated with a radiation-hardened oxide, and small sample-to-sample variations are observed. A small increase in E ′ δ center density may occur in some non-radiation-hardened oxides during repeated irradiation/TSC measurement cycles. The importance of choosing an appropriate bias to obtain accurate measurements of trapped charge densities and energy distributions is emphasized. A 10 nm deposited oxide with no subsequent annealing above 400°C shows a different trapped-hole energy distribution than thermally grown oxides, but a similar distribution to thermal oxides is found for deposited oxides annealed at higher temperatures. Charge neutralization during switched-bias irradiation is found to occur both because of hole-electron annihilation and increased electron trapping in the near-interfacial SiO 2 . Limitations in applying TSC to oxides thinner than ∼5 nm are discussed.

A general centroid determination methodology, with application to multilayer dielectric structures and thermally stimulated current measurements

A general methodology is developed to experimentally characterize the spatial distribution of occupied traps in dielectric films on a semiconductor. The effects of parasitics such as leakage, charge transport through more than one interface, and interface trap charge are quantitatively addressed. Charge transport with contributions from multiple charge species is rigorously treated. The methodology is independent of the charge transport mechanism(s), and is directly applicable to multilayer dielectric structures. The centroid capacitance, rather than the centroid itself, is introduced as the fundamental quantity that permits the generic analysis of multilayer structures. In particular, the form of many equations describing stacked dielectric structures becomes independent of the number of layers comprising the stack if they are expressed in terms of the centroid capacitance and/or the flatband voltage. The experimental methodology is illustrated with an application using thermally stimulated current (TSC)...

Radiation characteristics of SIPOS and polysilicon resistors

The radiation characteristics of polysilicon and SIPOS resistors are compared. SIPOS is being considered as a replacement material for polysilicon in feedback resistors in rad-hard ICs. Both materials show little change in resistivity to gamma radiation and are much more neutron-radiation resistant than bulk silicon. >