P.S. Winokur

Simple technique for separating the effects of interface traps and trapped‐oxide charge in metal‐oxide‐semiconductor transistors

A new technique is presented for separating the threshold‐voltage shift of a metal‐oxide‐semiconductor transistor into shifts due to interface traps and trapped‐oxide charge. This technique is applied to threshold‐voltage shifts on an n‐channel transistor that result from ionizing radiation.

Correlating the Radiation Response of MOS Capacitors and Transistors

A new technique is presented for separating the threshold-voltage shift of an MOS transistor into shifts due to interface states and trapped-oxide charge. Using this technique, the radiation responses of MOS capacitors and transistors fabricated on the same wafer are compared. A good correlation is observed between p-substrate capacitors and n-channel transistors irradiated at 10 V, as well as between n-substrate capacitors and p-channel transistors irradiated at 0 V. These correlations were verified for samples having large variations in the amount of radiation-induced trapped holes and interface states. An excellent correlation is also observed between n-channel capacitors and n-substrate transistors irradiated under positive bias. The use of capacitors separately fabricated on control wafers for potential use in process development or monitoring is clearly demonstrated.

Effects of oxide traps, interface traps, and ‘‘border traps’’ on metal‐oxide‐semiconductor devices

We have identified several features of the 1/f noise and radiation response of metal‐oxide‐semiconductor (MOS) devices that are difficult to explain with standard defect models. To address this issue, and in response to ambiguities in the literature, we have developed a revised nomenclature for defects in MOS devices that clearly distinguishes the language used to describe the physical location of defects from that used to describe their electrical response. In this nomenclature, ‘‘oxide traps’’ are simply defects in the SiO2 layer of the MOS structure, and ‘‘interface traps’’ are defects at the Si/SiO2 interface. Nothing is presumed about how either type of defect communicates with the underlying Si. Electrically, ‘‘fixed states’’ are defined as trap levels that do not communicate with the Si on the time scale of the measurements, but ‘‘switching states’’ can exchange charge with the Si. Fixed states presumably are oxide traps in most types of measurements, but switching states can either be interface tr...

Physical Mechanisms Contributing to Device "Rebound"

The physical mechanisms that produce rebound have been identified. The positive increase in threshold voltage during a bias anneal is due to annealing of oxide trapped charge. Rebound can be predicted by measuring the contribution to the threshold voltage from radiation-induced interface states immediately after irradiation.

SEU-sensitive volumes in bulk and SOI SRAMs from first-principles calculations and experiments

Large-scale three-dimensional (3D) device simulations, focused ion microscopy, and broadbeam heavy-ion experiments are used to determine and compare the SEU-sensitive volumes of bulk-Si and SOI CMOS SRAMs. Single-event upset maps and cross-section curves calculated directly from 3D simulations show excellent agreement with broadbeam cross section curves and microbeam, charge collection and upset images for 16 K bulk-Si SRAMs. Charge-collection and single-event upset (SEU) experiments on 64 K and 1 M SOI SRAMs indicate that drain strikes can cause single-event upsets in SOI ICs. 3D simulations do not predict this result, which appears to be due to anomalous charge collection from the substrate through the buried oxide. This substrate charge-collection mechanism can considerably increase the SEU-sensitive volume of SOI SRAMs, and must be included in single-event models if they are to provide accurate predictions of SOI device response in radiation environments.

Border traps: Issues for MOS radiation response and long-term reliability

Abstract We have performed an extensive study of the effects of border traps (near-interfacial oxide traps that can communicate with the underlying Si over a wide range of time scales) on the response of metal-oxide-semiconductor (MOS) devices to ionizing radiation. Estimates of border-trap densities for several types of MOS devices are obtained by capacitance-voltage (CV) hysteresis, 1 f noise, and combined CV/thermally-stimulated-current methods. A new “dual-transistor border-trap” (DTBT) technique is described in detail which combines conventional threshold-voltage and 1-MHz charge-pumping measurements on n- and p- channel MOS transistors to estimate radiation-induced oxide-, interface-, and border-trap charge densities. Estimates of border-trap charge densities obtained via the DTBT technique agree well with trap densities inferred from other techniques. In some devices, border-trap charge densities (which can be greater than 1012 cm−2 following ionizing radiation exposure) can approach or exceed interface-trap charge densities, emphasizing the need to distinguish border-trap effects from interface-trap effects in models of MOS radiation response and long-term reliability. This appears to be especially critical for MOS devices with ultrathin (less than ∼6 nm) oxides, in which border traps and interface traps likely will be the dominant defect types. Effects of border traps on MOS scattering rates, cryogenic applications, and long-term reliability assessment are also discussed.

Field dependence of interface-trap buildup in polysilicon and metal gate MOS devices

The electric field dependence of radiation-induced oxide- and interface-trap charge ( Delta V/sub ot/ and Delta V/sub it/) generation for polysilicon- and metal-gate MOS transistors is investigated at electric fields (E/sub ox/) from -4.2 MV/cm to +4.7 MV/cm. If electron-hole recombination effects are taken into account, the absolute value of Delta V/sub ot/ and the saturated value of Delta V/sub it/ for both polysilicon- and metal-gate transistors are shown to follow an approximate E/sup -1/2/ field dependence for E/sub ox/>or=0.4 MV/cm. An E/sup -1/2/ dependence for the saturated value of Delta V/sub it/ was also observed for negative-bias irradiation followed by a constant positive-bias anneal. The E/sup -1/2/ field dependence observed suggests that the total number of interface traps created in these devices may be determined by hole trapping near the Si/SiO/sub 2/ interface for positive-bias irradiation or near the gate/SiO/sub 2/ interface for negative bias irradiation, though H/sup +/ drift remains the likely rate-limiting step in the process. Based on these results, a hole-trapping/hydrogen transport model-involving hole trapping and subsequent near-interfacial H/sup +/ release, transport, and reaction at the interface-is proposed as a possible explanation of Delta V/sub it/ buildup in these polysilicon- and metal-gate transistors. >

Three-dimensional simulation of charge collection and multiple-bit upset in Si devices

In this paper, three-dimensional numerical simulation is used to explore the basic charge-collection mechanisms in silicon n/sup +//p diodes. For diodes on lightly-doped substrates ( >

An Evaluation of Low-Energy X-Ray and Cobalt-60 Irradiations of MOS Transistors

An evaluation of methodologies for irradiating MOS transistors with low-energy x-ray and Co-60 sources has been performed. We find that comparisons of voltage shifts produced by bulk trapped charge and interface states in MOS transistors irradiated using two different low energy x-ray sources (an ARACOR 10 keV W source and an 8 keV Cu source) agree to within better than 30 percent. This quality of agreement is similar in magnitude to that between MOS devices irradiated by different Co-60 sources. In contrast, the measurements indicate that interlaboratory comparisons of ratios of shifts produced by x-ray and Co-60 sources can lead to differences in ratios as large as a factor of ~1.7. Improved electron-hole recombination data for oxides is presented. This recombination correction, in conjunction with a correction for interface dose enhancement, is used to predict the ratios of shifts produced by x-ray and Co-60 sources. However, the results show that corrections for electron-hole recombination and interface dose enhancement do not, by themselves, adequately predict the field dependent behavior of these transistors.

The Role of Hydrogen in Radiation-Induced Defect Formation in Polysilicon Gate MOS Devices

The role of hydrogen in the generation of radiation-induced interface-trap and oxide-trapped charge in MOS polysilicon gate capacitors has been investigated. The concentration of radiation-induced interface-trap and oxide-trapped charge measured both immediately after irradiation and after postirradiation anneal increases if high temperature anneals are performed in hydrogen. We have analyzed these results in the context of several models of interface-trap and oxide-trapped charge formation. The mutual increase in the concentration of oxide-trapped charge and the early-time (1 msec to 10 sec) component of interface-trap charge with the amount of hydrogen used during processing suggests that the breaking of Si-H or Si-OH bonds may be responsible for much of the defect formation at or near the silicon/silicon dioxide interface.