R. Ichimiya

First Performance Evaluation of an X-Ray SOI Pixel Sensor for Imaging Spectroscopy and Intra-Pixel Trigger

We have been developing a monolithic active pixel sensor with the 0.2 μm Silicon-On-Insulator (SOI) CMOS technology, called SOIPIX, for the wide-band X-ray imaging spectroscopy on future astronomical satellites. SOIPIX includes a thin CMOS-readout-array layer and a thick high-resistivity Si-sensor layer stacked vertically on a single chip. This arrangement allows for fast and intelligent readout circuitries on-chip, providing advantages over the charge-coupled device (CCD). We have designed and built a new SOIPIX prototype XRPIX1 for X-ray detection. XRPIX1 implements a correlated double sampling (CDS) readout circuit in each pixel to suppress the reset noise. We obtained an energy resolution of full width at half maximum of 1.2 keV (5.4%) at 22 keV with a chip having a 147 μm sensor depletion at a back bias of 100 V cooled to -50°C. Moreover, XRPIX1 offers intra-pixel hit trigger (timing) and two-dimensional hit-pattern (position) outputs. We also confirmed the trigger capability by irradiating a single pixel with laser light.

Development of FD-SOI monolithic pixel devices for high-energy charged particle detection

Monolithic pixel devices fabricated with a siliconon-Insulator (SOI) technology are excellent candidates to realize particle detectors of fast response and least material yet simple in fabrication. In our SOI pixel devices the sensitive part is the “handle” wafer, to which we examined high resistive FZ wafers of both p- and n-types together with CZ wafer of n-type. Full depletion of the FZ wafers is easily achievable for typical thicknesses of 260 to 500 µm. We thinned these devices to 100 to 50 µm. The response was evaluated with infrared and red lasers, and in a high energy beam. Irradiation to 60Co γ was carried out to verify the radiation tolerance of the devices.

Fine Pitch and Low Material Readout Bus for the Silicon Pixel Detector in the PHENIX Vertex Tracker

The silicon pixel detector will be installed in summer 2009 as part of the RHIC-PHENIX silicon vertex tracker (VTX) upgrade at the Brookhaven National Laboratory. The VTX consists of a silicon pixel detector and stripixel detector. For the construction of the silicon pixel detector, we have developed a fine pitch and low material readout bus as the backbone parts of the VTX. In this article, we report the development of the readout bus.

Performance study of monolithic pixel detectors fabricated with FD-SOI technology

We are developing monolithic pixel detectors with a 0.2 µm CMOS, fully-depleted silicon-on-insulator (SOI) technology. The substrate is high-resistivity silicon and works as a radiation sensor having p-n junctions. The SOI layer is a 40 nm thick silicon, where readout electronics is implemented. There is a buried oxide (BOX) layer between these silicon layers. We have already done several Multi Project Wafer (MPW) runs by gathering many pixel designs into a photo mask set, and as the results, several types of integration type pixel detectors (INTPIX) were fabricated. In this document, the design concept and performance in some of INTPIX detectors are described.

Development of X-ray imaging spectroscopy sensor with SOI CMOS technology

We have been developing a monolithic active pixel sensor with the 0.2 μm Silicon-On-Insulator (SOI) CMOS technology, i.e. SOIPIX, for the X-ray imaging spectroscopy on future astronomical satellites. SOIPIX includes a thin CMOS readout layer and a thick high-resistivity Si-sensor layer vertically on a single chip, which would provide advantages in capabilities of direct and flexible readout circuitries over charge-coupled device (CCD). We have built INTPIX2/3 (2008/2009) and XRPIX1(2010). We successfully confirmed the capability of X-ray imaging and spectroscopy in a photon-counting mode by irradiating INTPIX2/3 with monochromatic X-rays. To reduce the readout noise, we designed and built XRPIX1, which has a correlated double sampling (CDS) readout circuit in each pixel to suppress the reset noise. We obtained an energy resolution of FWHM ∼1.5 keV(7%)@22 keV with XRPIX1 cooled at 50 degree. Moreover, XRPIX1 offers intra-pixel hit trigger and one-dimensional hit-pattern outputs. We also confirmed the trigger capability by irradiating a single pixel of XRPIX1 with laser light.

Reduction techniques of the back gate effect in the SOI Pixel Detector

We have fabricated monolithic pixel sensors in 0.2 μm Silicon-On-Insulator (SOI) CMOS technology, consisting of a thick sensor layer and a thin circuit layer with an insulating buried-oxide, which has many advantages. However, it has been found that the applied electric field in the sensor layer also affects the transistor operation in the adjacent circuit layer. This limits the applicable sensor bias well below the full depletion voltage. To overcome this, we performed a TCAD simulation and added an additional p-well (buried pwell) in the SOI process. Designs and preliminary results are presented.

Evaluation of a SOI pixel sensor with thick depletion layer for future X-ray astronomical missions

We report on the evaluation test of our novel pixel sensor named XRPIX1-FZ which is developed for the future X-ray astronomy mission. The mean gain of XRPIX1-FZ is 3.3 µV/e. and the dispersion of the gain among the pixels is 1% in the standard deviation. We confirmed the energy resolution of 260 eV in FWHM at 8 keV. We achieved the full depletion (250 µm) at 30 V back bias voltage.

Integrated radiation image sensors with SOI technology

We have developed monolithic radiation detectors based on a 0.2 µm Fully-Depleted Silicon-on-Insulator (FD-SOI) CMOS technology. It has both a thick, high-resistivity sensor layer and a thin LSI circuit layer in a single chip. To shield the electronics part from the sensor region, we have created a buried well region under the buried oxide (BOX) layer of the SOI wafer. Two type of detectors, integration and counting types, are being developed.