R. Picos

Parameter Extraction of a Solar Cell Compact Model usign Genetic Algorithms

We present a method to extract the model parameters of illuminated solar cells based on genetic algorithms. The solar cell model is the well known lumped parameter equivalent circuit containing four components. Its mathematical description has been made explicit using of the Lambert function. We have tested the ability of our method against a direct extraction method to give back some known results. The test consists in fitting I-V characteristics of an organic photovoltaic solar cell obtained from randomly generated parameters. The accuracy and the reliability of the results are much higher, particularly concerning the reverse saturation current. The time needed to perform the extraction of each set of parameter is around 100s in a PC with a dual core processor, at 3.5GHz with 2GB RAM.

A new procedure to extract the threshold voltage of MOSFETs using noise-reduction techniques

Abstract A new way to extract the threshold voltage of MOSFET is presented. It combines the well known extraction method based on determining the maximum of the second derivative of I D with respect to V GS for V DS approaching zero, with digital signal processing techniques to increase the signal/noise ratio. The derivatives are calculated on the Fourier transform space and a low-pass filter is used to smooth the function before taking the inverse transform. This procedure combines the advantage of being a standard method based on a physical property, with a noise immunity comparable to the most recent extraction methods, without requiring a costly computing effort. The results are compared with other methods using experimental data from 0.7 and 0.07 μm bulk CMOS technologies.

Parameter Extraction Method using Genetic Algorithms for an Improved OTFT Compact Model

In this paper, an improved compact OTFT model extending previous models into the subthreshold regime is presented. Two parameter extraction techniques using genetic algorithms (queen-bee and crossing-mates) are considered in order to determine the values of the main model parameters. The model and parameter extraction procedures are applied to a set of experimental measures in OTFTs from Infineon. Agreement between experimental and modelled DC I-V characteristics is excellent with both extraction methods but crossing-mates algorithm is faster and its results are more independent of the initial conditions.

Optimised design of an organic thin-film transistor amplifier using the gm/ID methodology

Most of the applications of circuits that are currently in existence use mainly digital circuits. However, interfacing with the external world is a task that can be only accomplished by analog circuits. Thus, to obtain a functional system, some attention must be paid to them, especially when using organic thin-film transistors. In this case, some new issues arise that are very different from those in the digital world. Analog circuits pose a special problem to analog designers. Owing to their low mobilities, they present very low gains, and biasing them in the right point becomes a critical point. Another critical aspect is the high parameter dispersion, which makes analog designs quite complex. In this study, we will try to present a similar strategy, adapted to the specific case of organic TFTs.

Influence of MOSFET parameter extraction in distortion analysis using SPICE

The effect of MOSFET model parameters on distortion analysis of a class A amplifier is examined. Derivatives of the drain current, transconductance and output conductance are dominant factors in harmonic distortion. Model parameter affecting these derivatives are described, then the sensitivity of the amplifier nonlinearity figures (P/sub 1dB/ and IIP3) to the variations of these parameters is analyzed. Simulation results are validated through measurements using AMS 0.35/spl mu/m technology devices.

Study of frequency dispersion effects to consider in a capacitance model for OTFTs

This work presents a study of the frequency dispersion effects of the capacitance-voltage characteristics of organic PMMA on P3HT Thin Film Transistors (TFT) using simulated curves. For validation, simulated CV characteristics at 1 MHz are compared with experimental curves, measured at the same frequency.

Chapter Four – Nanoscale FETs

Since the invention of the integrated circuit (IC) in 1958, engineers and researchers around the world have worked on how to put more speed, performance and value onto smaller chips of silicon. The semiconductor industry has made considerable progress, especially regarding the Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The fundamental driver has been the continued shrinking of its feature sizes, allowing the exponential growth in device count that tracks the well-known Moores Law, first formulated by Intel co-founder Gordon Moore. However, this law is a rough prediction of the future of IC expansion. The need of a more accurate forecast defined the International Technology Roadmap for Semiconductors (ITRS), which has been predicting and driving the pace of semiconductor technology at the same time. The use of CMOS technology also for high-frequency (HF) applications is now common. This is due to the significant increase in the unity current gain frequency of modern deep submicrometer MOS devices. However, to be competitive against other technologies for high-frequency (HF) applications, MOSFETs need to demonstrate comparable noise performance. Although the channel thermal noise of MOSFET has been known to be the most dominant source of noise in the device, additional noise sources emerge as the CMOS technology scales down, such as gate tunneling current, and substrate noise. On the other hand, since the noise figure of the MOSFET decreases with technology scaling, HF noise measurement, and characterization of extremely small devices is becoming more challenging. Due to these challenges, there is a lot of research around new technologies, new materials and new devices. This chapter presents a review of some of the recent results in this exciting area.

EFFECT OF PROCESS VARIATIONS ON AN OTFT COMPACT MODEL PARAMETERS

We have studied the effect of some of the possible deviations on the values of the extracted parameters of a specific OTFT model, considering OTFTs designed using P3HT as semiconductor layer, PMMA as insulator, bottom gate, and top gold contacts. Specifically, we have studied the influence of misposition or misalignment of the masks, the effect of imperfections of etching, and the effect of variations on the layer deposition process. These effects have been simulated using the Silvaco Athena software, and they have been modeled as horizontal shifts of the etching windows and variations of the layers thickness. Once the devices were defined, they were simulated using Silvaco Atlas, and parameter extraction was performed using a specifically developed algorithm. We have found a strong correlation among some of the physical parameters and the model parameters that may offer useful insight for process optimization. Moreover, strong correlations have been found also among the model parameters. We have used these results to develop a Monte Carlo model, suitable for statistical circuit simulation.

Modelling of Thin Film Transistors for Circuit Simulation

We review recent physics-based, compact models for thin film transistors (TFTs), including amorphous (a-Si), polysilicon (poly-Si), nanocrystalline silicon (nc-Si), and organic TFTs. The models accurately reproduce the DC characteristics for different geometries. We also present a universal TFT model paradigm, which allows to obtain a suitable estimation of TFT characteristics using only eight parameters, which are very easy to extract. This universal TFT model is used for the first iteration step in complete models adapted to each type of device.

An Internet application to perform parameter extraction in MOS transistors

In this paper a tool able to extract MOS parameters and perform circuit simulation using these parameters is presented. One of its main characteristics is the ability to run from a personal computer connected to Internet. That is, a client-server application is considered in this work. The tool obtains MOS parameters from experimental measurements of a VLSI design or from user-given data. Once the measurements are obtained, a parameter extraction procedure of the MOS devices is run, aiming at Level3 parameters. These parameters are then included in a SPICE model and a circuit simulation can be run through Internet.