R. Swoboda

1.25 Gbit/s Over 50 m Step-Index Plastic Optical Fiber Using a Fully Integrated Optical Receiver With an Integrated Equalizer

A single-chip optical receiver with an integrated equalizer is used to achieve a high performance gigabit transmission over step-index plastic optical fiber (SI-POF). The integrated equalizer can compensate for different POF lengths up to 50 m. The integrated optical receiver is fabricated in a low-cost silicon 0.6 μ m BiCMOS technology and has a power consumption of 100 mW. Real-time transmission at data rates of 1.8 Gbit/s over 20 m SI-POF and 1.25 Gbit/s over 50 m SI-POF with high sensitivities and BER of 10-9 is achieved. The optical transmitter is based on an edge emitting laser.

Optical Wireless Communication Systems in the Mb/s to Gb/s Range, Suitable for Industrial Applications

For future short- and mid-range industrial applications, optical wireless (OW) communication systems are expected to play a major role. When moderate transmission rates (100 Mb/s range) are required, OW communications present a viable and promising technology, supplemental to conventional radio wireless systems. Advanced approaches based on diversity techniques and adaptive signal processing show potential to achieve both high spatial coverage and high bit rates of more than 100 Mb/s. Visible-light communication systems using white phosphorescent LEDs equally present an interesting application potential, combining illumination with data transfer. When high data volumes (100 Gb/s range) need to be transmitted, tailored optical data links provide a solution of choice. Exemplarily, a scalable (24-140 Gb/s) optical data link is presented, developed for future implementation in maskless lithography systems. The link comprises a high-speed data buffer with synchronizable architecture and scalable throughput (N × 24 Gb/s), an optical free-space transmission solution, and finally, a 45-channel low-noise optical receiver chip based on BiCMOS 0.6 μm technology.

Integrated BiCMOS p-i-n Photodetectors With High Bandwidth and High Responsivity

The integration of the fast and efficient silicon p-i-n photodetectors is presented. The suggested advanced p-i-n design speeds up the detectors, avoiding slow carrier diffusion: the p+ anode is arranged in a thick n

11Gb/s monolithically integrated silicon optical receiver for 850nm wavelength

low-doped intrinsic region placed inside an n+ -doped region. Two p-i-n detector concepts are compared: a plain p-i-n photodiode and a structured p-i-n fingerdiode that is optimized for shorter wavelengths. Due to this setup and a thick intrinsic region, a responsivity of R=0.25 A/W (0.42 A/W) {0.27 A/W} at a wavelength of lambda=410 nm (660 nm) {850 nm} for the p-i-n fingerdiode, a bandwidth up to f3dB=3GHz and a dark current of Idark=0.36 pA at Vp-i-n=17 V for the p-i-n photodiode could be reached. As a system-on-chip (SOC), BiCMOS circuitry is combined with the integrated photodetector to an optoelectronic integrated circuit (OEIC) as shown on an exemplary application of a 6-Gb/s monolithic optical receiver. The chips are realized in a modified 0.5 mum BiCMOS process

A low-noise monolithically integrated 1.5 Gb/s optical receiver in 0.6-/spl mu/m BiCMOS technology

A monolithically integrated optical receiver is realized in a modified silicon 0.5mum BiCMOS process with fT=25 GHz that contains a pin photodiode. At a wavelength of 850nm, a BER of 10-9 , a PRBS of 231-1, the receiver has sensitivities of -10.8dBm, -10.1dBm, and -8.9dBm for data rates of 8Gb/s, 10Gb/s, and 11Gb/s, respectively

An integrated optical receiver for multilevel data communication over plastic optical fiber

Results of a monolithically integrated optical receiver for optical data transmission and optical interconnects is presented. A 0.6-/spl mu/m BiCMOS technology is used to realize the optoelectronic integrated circuit (OEIC). This OEIC can be used at data rates of 622 Mb/s, 1Gb/s, 1.25 Gb/s, and 1.5 Gb/s with a dual supply of 5 and 17 V with sensitivities of -24.5, -24.3, -24.1, and -22.1 dBm, respectively, at a bit-error rate of 10/sup -9/. With a single supply of 5 V, operation at 1.25 Gb/s with a sensitivity of -22.7 dBm was achieved.

Gigabit transmission over PMMA step-index plastic optical fiber using an optical receiver for multilevel communication

A BiCMOS integrated optical receiver with high sensitivity and linearity is presented. An automatic gain control transimpedance amplifier and linear post amplifiers are used to maintain a high linearity with multilevel modulation. Using multilevel signaling and large-diameter integrated photodiodes make the presented optical receiver suitable for small-bandwidth high-attenuation large-core PMMA step index plastic optical fiber. A measured sensitivity of −31dBm (BER=10−9) at 250Mb/s is presented for a binary signal. A data rate of 500Mb/s and a sensitivity of −25dBm (BER=10−9) are achieved with four-level pulse amplitude modulation (4-PAM). An error-free transmission over 40m PMMA step index plastic optical fiber was achieved at 500Mb/s using 4-PAM signaling with the presented multilevel optical receiver.

Speed-enhanced OEIC with area-efficient charge pump and shunt regulator

1Gbit/s transmission with four-level pulse amplitude modulation over low cost 20m PMMA step-index plastic optical fiber at a BER of 10−8 was achieved by using an integrated optical receiver designed for multilevel signalling.

Comparison of CMOS and BiCMOS optical receiver SoCs

The bandwidth of the photodiode in an optoelectronic integrated circuit with a single 5 V supply is extended from 20MHz to 771MHz by an innovative on-chip voltage-up-converter. A shunt-regulator keeps the die are small and exploits breakdown voltages of available devices best. Rise and fall times below 0.5ns are achieved allowing operation at data rates in excess of 1Gbits/s. A possible receiver sensitivity of -22.5 dBm is obtained for a wavelength of 670nm.

A gigabit fully integrated plastic optical fiber receiver for a RC-LED source

Currently two very interesting trends in design of optical receivers can be observed. The first is to realize optical receivers in deep-sub-μm CMOS technology and to integrate them in analog-digital systems-on-a-chip (SoC). The second even much more innovative trend is to integrate voltage-up-converters (VUCs) in optoelectronic integrated circuits (OEICs) to increase the bandwidth and data rate, whereby only the chip voltage supply is necessary. The properties of deep-sub-µm CMOS optical receivers and of sub-μm OEICs with respect to current consumption, noise, and chip area will be compared. For both trends a new design each and measured results will be presented. The first example is a burst-mode receiver in digital 0.18μm CMOS technology with sensitivities better than -28 dBm and -22 dBm at data rates of 622Mb/s and 1.25Gb/s, respectively, for a bit error rate of 10-10 each. These values compare to sensitivities of -24.5 dBm and -24.1 dBm, respectively, of a 0.6μm BiCMOS OEIC. For implementation of the burst-mode receiver in an analog-digital SoC, a differential circuit is chosen. Another example is an OEIC in 0.6μm BiCMOS technology with an integrated VUC, which generates a bias voltage of 16V for the integrated photodiode from the chip supply voltage of 5V. Due to the VUC, the data rate for the given technology is increased from 50Mb/s to 1.5Gb/s. The dependence of the receiver sensitivity and of the maximum photocurrent on the VUC clock-frequency will be shown. The VUC-OEIC represents a complete SoC consisting of sensor, analog and digital part. Aspects of substrate noise coupling from the digital part into the photodiode and amplifier are discussed.