R. Van Overstraeten

III–nitrides: Growth, characterization, and properties

During the last few years the developments in the field of III–nitrides have been spectacular. High quality epitaxial layers can now be grown by MOVPE. Recently good quality epilayers have also been grown by MBE. Considerable work has been done on dislocations, strain, and critical thickness of GaN grown on different substrates. Splitting of valence band by crystal field and by spin-orbit interaction has been calculated and measured. The measured values agree with the calculated values. Effects of strain on the splitting of the valence band and on the optical properties have been studied in detail. Values of band offsets at the heterointerface between several pairs of different nitrides have been determined. Extensive work has been done on the optical and electrical properties. Near band-edge spectra have been measured over a wide range of temperatures. Free and bound exciton peaks have been resolved. Valence band structure has been determined using the PL spectra and compared with the theoretically calcu...

Transport equations in heavy doped silicon

The general transport equations in a heavy doped semiconductor are given, taking the position-dependent band structure into account. An intrinsic concentration depending on the doping levels is introduced. This quantity allows us to use the classical equations in a slightly modified form, if Maxwell-Boltzmann statistics can be applied for one or both kinds of the carrier. The total density of states in a heavy doped semiconductor is assumed to be the envelope of the density of states of the conduction (valence) band and impurity band. The effect of the skewness of the impurity band is included. The Fermi level and the effective intrinsic carrier concentration are calculated for this total density of states function. Experimental evidence for the calculated values is given.

Minority carrier recombination in heavily-doped silicon

Abstract A review of our present understanding about the minority carrier recombination in silicon with dopant concentration in the range of 1018–1020 cm−3 is presented. After providing a short phenomenological description of carrier recombination processes and lifetime, the main theories of carrier recombination in a semiconductor are briefly reviewed and their expected contributions to carrier recombination in silicon at heavy doping are indicated. The various methods used for measuring the minority carrier lifetime in heavily doped silicon are described and critically examined. Four different mechanisms are examined to explain the available lifetime data. Two of these involve SRH-type phononic recombination (i) via deep level traps generated by dopant introduced defects and (ii) through shallow donor/acceptor states. The other two non-phononic mechanisms are: (iii) Band to band Auger recombination and (iv) trap assisted Auger recombination. Mechanism (i) can not explain the observed insensitivity of lifetime to processing conditions and the dopant atoms, and contribution of (ii) remains insignificant up to the heaviest doping. Phonon assisted band to band Auger recombination appears to explain the measured lifetimes satisfactorily in p-type silicon. However, for n-type silicon this mechanism predicts considerably higher values of lifetime than the measured results and it is likely that mechanism (iv) (and probably (i) also) competes with this process. Calculations indicate that the rate of trap-assisted Auger recombination through the dopant generated acceptor states in p-type silicon and through donor states in n-type silicon becomes large enough to compete with the band to band Auger process at heavy doping. In n-type silicon Auger recombination through crystal defects like vacancies may also become important. Perhaps all these processes contribute to the carrier recombination at heavy doping but which of these controls the lifetime in n-type silicon is not known.

Theory of the MOS transistor in weak inversion-new method to determine the number of surface states

The drain current I D versus gate voltage V G of an MOST operating in weak inversion, and the influence of surface potential fluctuations on this characteristic have been studied before [1], [2]. The purpose of this paper is to derive an expression of the drain current I D versus the drain voltage V D for devices with a channel length not smaller than 20 µm. It is demonstrated that the surface potential fluctuations do not affect the slope of the I D -V D curve, whereas the density N ss of surface states strongly influences the slope for small drain voltages. This yields a simple and useful technique to determine N ss on MOS transistors.

Low-cost industrial technologies of crystalline silicon solar cells

Approximately 2 billion people, mainly in Third World countries, are not connected to an electric grid. The standard, centralized grid development is too expensive and time consuming to solve the energy demand problem. Therefore, there is a need for decentralized renewable energy sources. The main attractiveness of solar cells is that they generate electricity directly from sunlight and can be mounted in modular, stand-alone photovoltaic (PV) systems. Particular attention is paid in this paper to crystalline silicon solar cells, since bulk silicon solar-cell (mono and multi) modules comprise approximately 85% of all worldwide PV module shipments. Energy conversion efficiency as high as 24% has been achieved on laboratory, small-area monocrystalline silicon cells, whereas the typical efficiency of industrial crystalline silicon solar cells is in the range of 13-16%. The market price of PV modules remains for the last few years in the range of

Calculation of the emitter efficiency of bipolar transistors

3.5-4.5/watt peak (Wp). For the photovoltaic industry, the biggest concern is to improve the efficiency and decrease the price of the commercial PV modules. Efficiency-enhancement techniques of commercial cells are described in detail. Adaptation of many high-efficiency features to industrially fabricated solar cells. The latest study shows that increasing the PV market size toward 500 MWp/y and accounting for realistic industrial improvements can lead to a drastic PV module price reduction down to

Thick-film metallization for solar cell applications

1/Wp.

Critical thickness and strain relaxation in lattice mismatched II–VI semiconductor layers

The emitter efficiency of a bipolar transistor is calculated taking heavy doping effects such as impurity band formation and band tailing into account. It is shown that in most cases these effects, rather than the minority carrier lifetime in the emitter are limiting the transistor current gain. This allows us to define an effective emitter impurity profile for use in current transport calculations. The influence of the emitter and base impurity profiles upon the gain is studied, and experimental results are presented showing that the knowledge of the impurity profiles is sufficient to predict the one-dimensional current gain.

Inadequacy of the classical theory of the MOS transistor operating in weak inversion

The use of an integral printing technique for the fabrication of silicon solar cells is attractive due to its throughput rate, materials utilization, and modular, automatable design. The transfer of this technology from single crystal to semicrystalline silicon requires a significant amount of process optimization. Processing parameters found to be critical include the optimum glass frit content in the silver-based inks, the silver ink firing temperature, and the formation of the back-surface field using screen-printed aluminum layers. Open-circuit voltages as high as 617 mV have been achieved using a novel BSF approach on 4-in wafers. Important mechanisms controlling ink contact resistance, ink sheet resistivity, and ohmic contact on and silicon materials are discussed in this paper. The solar cell stability is a function of the glass frit and the firing temperature of the silver-based inks. Finally, a simple economic analysis, based on the IPEG technique, indicates that screen printing is a cost-effective option when the cell manufacturing is done on a large scale.

An analytical model for the determination of the transient response of CML and ECL gates

Critical thickness hc has been calculated for capped and uncapped lattice mismatched II–VI semiconductor epilayers. Both the old equilibrium theory and the improved theory have been used. The calculated values are compared with the experimental data on epilayers of several II–VI semiconductors and alloys. The observed values of hc are larger than the calculated values, a result similar to that observed with GeSi and InGaAs strained layers. The discrepancy is attributed to the difficulty in nucleating the dislocations. Strain relaxation in layers with thickness h>hc is also calculated. Observed strain relaxation in ZnSe layers grown on (100) GaAs shows good agreement with the equilibrium theory. In other cases, the observed relaxation is sluggish and the residual strain is larger than the calculated value. Many authors have observed that strain near the surface of the II–VI epilayers is small and increases as the depth increases. We describe an improved model to explain this observation. The agreement betw...