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Dive into the research topics where Rainer Dohle is active.

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Featured researches published by Rainer Dohle.


electronics system integration technology conference | 2010

Adapted assembly processes for flip-chip technology with solder bumps of 50 µm or 40 µm diameter

Rainer Dohle; Florian Schussler; Thomas Friedrich; Jorg Gossler; Thomas Oppert; Jörg Franke

The further miniaturization of electronic packages is driven by a large variety of applications with high requirements on pitch and form factor. This will be conducive to higher I/O-counts and a reduction of the solder bump size.


electronic components and technology conference | 2015

On the failure mechanism in lead-free flip-chip interconnects comprising ENIG finish during electromigration

Marek Gorywoda; Rainer Dohle; Andreas Wirth; Bernd Burger; Jorg Gossler

The aim of this research was to investigate the failure mechanism of lead-free (SAC305) flip-chip solder connections subjected to long-term electromigration. Interconnects with a nominal diameter of 60 m or 50 m were assembled in flip-chip organic packages with a pitch of 100 m. The under bump metallization (UBM) and surface finish on PCBs comprised of a 5 m thick electroless nickel immersion gold (ENIG) layer directly deposited on AlCu0.5 or Cu traces, respectively. Test vehicles were subjected to electromigration tests for over 30,000 hours at constant current densities of 8 kA/cm2 or 5 kA/cm2, respectively and nominal temperatures of 125 °C, 100 °C, or 28 °C until failure. Lifetime data was evaluated using Weibull statistics (as well as lognormal distribution, not shown here) and the mean times to failure (MTTF) calculated. The results were subsequently used to make an estimation of activation energy for electromigration. The evaluation yielded a value of Ea = 1.13±0.18 eV. The relatively high value of Ea points to a good robustness of the bump metallization investigated in our study conducive to a long life time under moderate operating conditions. Microstructure changes of interconnects in failed samples were subsequently thoroughly investigated by SEM and EDX. Electromigration damage was asymmetric in respect to the current flow direction through the solder bumps and occurred predominantly at the cathode contacts of the solder joints. However, contrary to findings reported in the literature, the most severe damage occurred at the PCB and not at the chip side. It was established that interconnects failed through dissolution and thinning of Ni-P layer, and eventually crack formation between Cu trace and solder. The failure was facilitated by electromigration-favored diffusion of Cu through Ni-P. ENIG deposited onto Al traces was more resilient to electromigration damage than ENIG applied to Cu.


electronic components and technology conference | 2011

Processing and reliability analysis of flip-chips with solder bumps down to 30 μm diameter

Jörg Franke; Rainer Dohle; Florian Schüßler; Thomas Oppert; Thomas Friedrich; Stefan Härter

The accelerated trend to smaller and lighter electronics has accentuated many efforts towards size reduction and increased performance in electronic products. However, equipment and processes of electronics production have to come along with this trend when it comes to connections on board level. The use of flip-chip bonding technology employing micro bumps for very fine pitch packaging is becoming increasingly important in the microelectronics industry. To meet these requirements, cost-efficient solder bumping and automated assembly technologies for the processing of flip-chips have been developed and qualified. Flip-chips used in this study show a pitch of 100 μm and solder ball diameter of 40 μm and 30 μm, respectively. Wafer level solder application has been done using wafer level solder sphere transfer (WLSST) process and solder sphere jetting (SB²) technology, respectively. The latter is a technique that has been used for many years in the wafer level packaging industry and is commonly known as a solder ball bumping tool. For the described work the SB² technology was scaled down for processing solder spheres with diameters of 30 μm with very good results achieved. Our research has shown that the underfill process is one of the most crucial factors when it comes to flip-chip miniaturization for high reliability applications. Therefore, a total of thirty different underfill materials were investigated initially in terms of flow time, gap height, filler sedimentation, and reliability. For reliability investigations, various standardized test conditions were applied to the test specimen. In previous experiments we found out that solder spheres of 50 μm seem to be the technological limit with current organic printed circuit board technology with subtractive structuring. Therefore, thin film ceramic as substrate material has been used showing excellent performance of the highly miniaturized solder joints at several reliability tests. Concluding long-term reliability and an analysis of the intermetallic growth are shown using SEM/EDX. Additionally, an analysis of the failure mechanism will be presented and recommendations for further miniaturization will be outlined. Advantages of the developed technology are lower cost compared to known techniques, very high flexibility and freedom in selection of solder composition including SAC, low melting alloys, gold-tin, and further special alloys.


Journal of Instrumentation | 2017

A sub-millimeter resolution detector module for small-animal PET applications

Ilaria Sacco; Rainer Dohle; Peter Fischer; Alberto Gola; C. Piemonte; Michael Ritzert

We present a gamma detection module optimized for very high resolution PET applications, able to resolve arrays of scintillating crystals with sub-millimeter pitch. The detector is composed of a single ceramic substrate (LTCC): it hosts four flip-chip mounted PETA5 ASICs on the bottom side and an array of SiPM sensors on the top surface, fabricated in HD-RGB technology by FBK. Each chip has 36 channels, for a maximum of 144 readout channels on a sensitive area of about 32 mm × 32 mm. The module is MR-compatible. The thermal decoupling of the readout electronics from the photon sensors is obtained with an efficient internal liquid channel, integrated within the ceramic substrate. Two modules have been designed, based on different SiPM topologies: • Light spreader-based: an array of 12 × 12 SiPMs, with an overall pitch of 2.5 mm, is coupled with a scintillators array using a 1 mm thick glass plate. The light from one crystal is spread over a group of SiPMs, which are read out in parallel using PETA5 internal neighbor logic.• Interpolating SiPM-based: ISiPMs are intrinsic position-sensitive sensors. The photon diodes in the array are connected to one of the four available outputs so that the center of gravity of any bunch of detected photons can be reconstructed using a proper weight function of the read out amplitudes. An array of ISiPMs, each 7.5 mm× 5 mm sized, is directly coupled with the scintillating crystals. Both modules can clearly resolve LYSO arrays with a pitch of only 0.833 mm. The detector can be adjusted for clinical PET, where it has already shown ToF resolution of about 230 ps CRT at FWHM. The module designs, their features and results are described.


electronic components and technology conference | 2012

Reliability study of lead-free flip-chips with solder bumps down to 30 μm diameter

Stefan Härter; Rainer Dohle; Andreas Reinhardt; Jörg Goßler; Jörg Franke

The ongoing trend to miniaturized electronics has induced many developments towards size reduction and increasing performance in electronic products. To meet these requirements the involved processes, materials and components in electronics production have to be enhanced for high performance and high reliability. Flip-chip technology is one technology of choice with potential for highest integration. In previous investigations technologies for cost-efficient solder bumping and automated assembly in an industrial environment were evaluated. Wafer level solder sphere transfer and solder sphere jetting were adapted to provide flipchips with solder bump diameters down to 30 μm for flip-chip assembly onto printed circuit boards as well as onto thin film ceramic substrates. The reliability tests done so far showed excellent achievable reliability performance of these ultrafine-pitch assemblies under various test conditions. Since electromigration of flip-chip interconnects is a very important reliability concern, characterization of new interconnect developments needs to be done regarding the electromigration performance in accelerated life tests. For all experiments, specially designed flip-chips with 10 mm by 10 mm by 0.8 mm in size have been used. The silicon die layout provides a pitch of 100 μm with solder bump sizes between 60 μm and 30 μm in diameter. The solder spheres consist of lead-free SnAgCu alloy and are placed on a Ni-P under bump metallization which has been realized in an electroless nickel process. For the electromigration tests within this study, multiple combinations of individual current densities and temperatures were adapted to the respective solder sphere diameters. Online measurements with separate daisy chain connections for each test coupon provide exact lifetime data during the electromigration tests, which are in some cases still in progress. Cross sectioning has been employed for the analysis of thermal diffusion as well as of the impact of electromigration influence on the failure mechanism using optical, SEM and EDX analysis, respectively. Reliability plots will be discussed regarding the electromigration performance for different test conditions applied to the respective test specimen for lifetime estimations.


nuclear science symposium and medical imaging conference | 2014

A compact, water-cooled, 144-channel photo sensor module for γ detection in PET

Ilaria Sacco; Rainer Dohle; Peter Fischer; Alberto Gola; C. Piemonte; Michael Ritzert

We present a very compact photo sensor module with an area of 32.8 × 32.0mm2 containing 12 × 12 Silicon Photomultipliers (SiPMs) in a pitch of (2.5mm)2. The readout of the 144 channels is done by highly specialized PETA5 ASICs (Position Energy Timing Asic) which offer self triggered hit detection (including neighbor logic and fast veto mechanisms), time stamping with 50ps bin width and digital amplitude measurement. The module uses a substrate which is cooled by a fluid running in internal channels. The SiPMs are glued and wire bonded in a regular pattern on the top side, the ASICs are flip chip mounted at the bottom side. Several modules will be plugged into a control and data readout PCB. The full height of these parts is below 1cm. The module can be used to read scintillator crystal arrays with a pitch of only 2.5mm in a 1 : 1 coupling, or smaller crystals with light spreaders. We present the module design and the first results obtained with 1 : 1 coupled LYSO crystal arrays.


electronics system integration technology conference | 2014

Investigation of electromigration behaviour in lead-free flip-chip solders connections

Rainer Dohle; Andreas Wirth

Packaging technology has to continuously evolve in order to keep pace with the demand for smaller and lighter products. One manifestation of this is the need to drastically reduce the size of flip-chip bumps and their pitch. To make things more challenging, the changes have to be mastered with new materials in response to lead-free legislation. At the same time the reliability of the electronic devices should not be sacrificed. In this respect, a relatively new challenge is also posed by the observation, that solder connections are vulnerable to electromigration. The aim of this research was to evaluate the long-term electromigration behaviour of lead-free (SAC305) flipchip solder connections with a nominal diameter of 60 μm or 50 μm, which have been assembled in flip-chip organic packages having electroless Nickel under bump metallization with a pitch of 100 μm. Test vehicles were subjected to electromigration tests for over 25,000 hours at constant current densities of 8 kA/cm2 or 5 kA/cm2 respectively, and nominal temperatures of 125 °C, 100 °C, or 28 °C until failure. The failure data has been evaluated employing Weibull statistics as well as lognormal distribution and the mean time to failure (MTTF) has been calculated. Only three out of twelve samples have failed after 25,000 h for 50 μm solder bumps tested at a current density of 5 kA/cm2 and a temperature of 100 °C; no failures at all have been observed at an ambient temperature of 28 °C. The comparison of the MTTFs for the different bump diameters leads to the result that, under the same testing conditions of current density and temperature, the life time of smaller bumps is considerably longer. This - on first sight - surprising finding can be explained by lower heat generation due to current flow, and thus by a lower temperature of these bumps. The results were subsequently used to estimate the parameters of Blacks equation. The evaluation yielded an activation energy of Ea = 1.13±0.18 eV and a current density exponent in the range of n = 4.9-2.2. The relatively high value of Ea points to a good robustness of the bump metallization investigated in our study; the variation of n indicates a change in failure mechanism.


Archive | 2008

Anschlussdraht, Verfahren zur Herstellung eines solchen und Baugruppe

Rainer Dohle; Holger Schulze; Jörg Goßler; Frank Rudolf


ECTC | 2011

Processing and reliability analysis of flip-chips with solder bumps down to 30 m diameter

Jörg Franke; Rainer Dohle; Florian Schüßler; Thomas Oppert; Thomas Friedrich; Stefan Härter


Microelectronics Reliability | 2011

Room Temperature Wedge-Wedge Ultrasonic Bonding using Aluminum Coated Copper Wire

Rainer Dohle; Matthias Petzold; Robert Klengel; Holger Schulze; Frank Rudolf

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Jörg Goßler

Dresden University of Technology

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Frank Rudolf

Dresden University of Technology

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Jörg Franke

University of Erlangen-Nuremberg

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Stefan Härter

University of Erlangen-Nuremberg

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C. Wenzel

Dresden University of Technology

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Peter Fischer

University of Nottingham

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C. Piemonte

fondazione bruno kessler

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