Rainer Steiner
Infineon Technologies
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Publication
Featured researches published by Rainer Steiner.
electronics packaging technology conference | 2004
Jens Pohl; Markus Graml; Peter Strobel; Rainer Steiner; Klaus Pressel; Stephan Stoeckl; Gerald Ofner; Charles Lee
We report a case study for the optimization of a flip chip based stacked die array test package. We demonstrate the importance of package substrate design and substrate thickness on the processibility and package warpage control. We found that for thin substrates copper balancing of the top and bottom die is crucial. We show the impact of flip chip die thickness and substrate thickness on the die attach of the top die(s) in the stack. Investigations on different top die attach alternatives show that tape die attach can have advantages. We demonstrate the importance of the vertical stack structure (i.e. flip chip thickness) and material selection (i.e. mold compound) on the overall warpage control of the package. The results show that even small changes in the package structure can have large impact on the warpage characteristics of the stacked die package
Archive | 2004
Michael Bauer; Christian Birzer; Georg Ernst; Rainer Steiner; Hermann Vilsmeier; Holger Woerner
Archive | 2003
Rainer Steiner; Horst Theuss
Archive | 2007
Thorsten Meyer; Gerald Ofner; Rainer Steiner
Archive | 2009
Jens Pohl; Hans-Joachim Barth; Gottfried Beer; Rainer Steiner; Werner Robl; Mathias Vaupel
Archive | 2008
Thorsten Meyer; Gerald Ofner; Rainer Steiner
Archive | 2007
Markus Brunnbauer; Jens Pohl; Rainer Steiner
Archive | 2010
Markus Brunnbauer; Jens Pohl; Rainer Steiner
Archive | 2005
Michael Bauer; Ulrich Bachmaier; Robert-Christian Hagen; Jens Pohl; Rainer Steiner; Hermann Vllsmeler; Holger Woerner; Bernhard Zuhr
Archive | 2003
Rainer Steiner; Horst Theuss