Rajesh Rao

Radio Frequency Transistors and Circuits Based on CVD MoS2

We report on the gigahertz radio frequency (RF) performance of chemical vapor deposited (CVD) monolayer MoS2 field-effect transistors (FETs). Initial DC characterizations of fabricated MoS2 FETs yielded current densities exceeding 200 μA/μm and maximum transconductance of 38 μS/μm. A contact resistance corrected low-field mobility of 55 cm(2)/(V s) was achieved. Radio frequency FETs were fabricated in the ground-signal-ground (GSG) layout, and standard de-embedding techniques were applied. Operating at the peak transconductance, we obtain short-circuit current-gain intrinsic cutoff frequency, fT, of 6.7 GHz and maximum intrinsic oscillation frequency, fmax, of 5.3 GHz for a device with a gate length of 250 nm. The MoS2 device afforded an extrinsic voltage gain Av of 6 dB at 100 MHz with voltage amplification until 3 GHz. With the as-measured frequency performance of CVD MoS2, we provide the first demonstration of a common-source (CS) amplifier with voltage gain of 14 dB and an active frequency mixer with conversion gain of -15 dB. Our results of gigahertz frequency performance as well as analog circuit operation show that large area CVD MoS2 may be suitable for industrial-scale electronic applications.

High-Performance Flexible Thin-Film Transistors Exfoliated from Bulk Wafer

Mechanically flexible integrated circuits (ICs) have gained increasing attention in recent years with emerging markets in portable electronics. Although a number of thin-film-transistor (TFT) IC solutions have been reported, challenges still remain for the fabrication of inexpensive, high-performance flexible devices. We report a simple and straightforward solution: mechanically exfoliating a thin Si film containing ICs. Transistors and circuits can be prefabricated on bulk silicon wafer with the conventional complementary metal-oxide-semiconductor (CMOS) process flow without additional temperature or process limitations. The short channel MOSFETs exhibit similar electrical performance before and after exfoliation. This exfoliation process also provides a fast and economical approach to producing thinned silicon wafers, which is a key enabler for three-dimensional (3D) silicon integration based on Through Silicon Vias (TSVs).

A novel low cost 25μm thin exfoliated monocrystalline Si solar cell technology

To achieve grid parity, photovoltaic (PV) technologies must reduce the production cost of PV modules to well below

Top-gated chemical vapor deposited MoS2 field-effect transistors on Si3N4 substrates

1/Wp. In crystalline Si (c-Si) solar cells the cost of raw Si wafers is over 40% of the module cost. There is an industry wide push to reduce the active Si content of the cell through a combination of thinner wafers and increased cell efficiency. However, cell manufacturers are struggling to reduce the wafer thickness below 150μm as there are no economically viable technologies for manufacturing very thin Si wafers and such thin silicon wafers impose stringent handling requirements as wafer breakage and yield loss impact final module cost. In this paper, we demonstrate for the first time, a novel exfoliation technology capable of producing large area (6-in diameter) 25μm thin flexible mono c-Si foils that will dramatically change the cost structure and form factor of high efficiency-Si solar cells without the yield losses and handling issues that are a major problem for traditional thin Si wafers. An un-optimized single side heterojunction cell has been formed with a 25μm exfoliated c-Si foil, which shows an efficiency of 12.5%. The cell characteristics of a 25μm thin c-Si cell with intrinsic a-Si passivation will be presented in the paper. Simulations show that with optimized texturing of the foil and passivation, higher efficiencies (20%) can be attained. Depending on the starting wafer or ingot thickness a final cell cost of between

Single heterojunction solar cells on exfoliated flexible ∼25 μm thick mono-crystalline silicon substrates

0.46/Wp to

Origin of shape anisotropy effects in solution-phase synthesized FePt nanomagnets

0.50/Wp can be achieved compared to

Back-contact solar cells in thin crystalline silicon

1.1/Wp for todays commercial thick crystalline Si cells.

High-Performance Vertical Gate-All-Around Silicon Nanowire FET With High- \(\kappa \) /Metal Gate

We report the electrical characteristics of chemical vapor deposited (CVD) monolayer molybdenum disulfide (MoS2) top-gated field-effect transistors (FETs) on silicon nitride (Si3N4) substrates. We show that Si3N4 substrates offer comparable electrical performance to thermally grown SiO2 substrates for MoS2 FETs, offering an attractive passivating substrate for transition-metal dichalcogenides (TMD) with a smooth surface morphology. Single-crystal MoS2 grains are grown via vapor transport process using solid precursors directly on low pressure CVD Si3N4, eliminating the need for transfer processes which degrade electrical performance. Monolayer top-gated MoS2 FETs with Al2O3 gate dielectric on Si3N4 achieve a room temperature mobility of 24 cm2/V s with Ion/Ioff current ratios exceeding 107. Using HfO2 as a gate dielectric, monolayer top-gated CVD MoS2 FETs on Si3N4 achieve current densities of 55 μA/μm and a transconductance of 6.12 μS/μm at Vtg of −5 V and Vds of 2 V. We observe an increase in mobility a...

Mechanical strength and reliability of a novel thin monocrystalline silicon solar cell

Mono-crystalline silicon single heterojunction solar cells on flexible, ultra-thin (∼25 μm) substrates have been developed based on a kerf-less exfoliation method. Optical and electrical measurements demonstrate maintained structural integrity of these flexible substrates. Among several single heterojunction ∼25 μm thick solar cells fabricated with un-optimized processes, the highest open circuit voltage of 603 mV, short circuit current of 34.4 mA/cm2, and conversion efficiency of 14.9% are achieved separately on three different cells. Preliminary reliability test results that include thermal shock and highly accelerated stress tests are also shown to demonstrate compatibility of this technology for use in photovoltaic modules.

Realization of dual-heterojunction solar cells on ultra-thin ∼25 μm, flexible silicon substrates

Controlling the morphology of inorganic nanocrystals is important because many of their electronic attributes are highly sensitive to shape and aspect ratio. FePt nanocrystals have potential as advanced magnetic materials for ultrahigh-density memory. This is due to their high shape and/or magnetocrystalline anisotropy, which allows bits as small as 3 nm to be thermally stable over typical data storage periods of 10 years. Herein, nanocrystals were simply fabricated by simultaneous reduction of platinum acetylacetonate and thermal decomposition of iron pentacarbonyl in properly chosen conditions of solvent/surfactant proportions and temperature for rational design of their shape and magnetic properties. This work has combined magnetometry measurements and micromagnetic simulations to illustrate the role of the external shape on the rotation of the magnetization vector for colloidal assemblies.