Ralf van Bentum

Impact of Scaling on the Performance of HfO 2 -Based Ferroelectric Field Effect Transistors

The recently discovered ferroelectric behavior of HfO2-based dielectrics yields the potential to overcome the main challenges of the ferroelectric field-effect transistors (FeFETs) - CMOS compatibility as well as scalability to the state-of-the-art technology nodes of logic transistors. In this paper, we study the impact of scaling on the memory performance of FeFET devices employing Si:HfO2 ferroelectric films. The operation capability was proven down to a gate length of 28 nm. Program/erase characteristics, endurance behavior, and retention properties were analyzed for FeFETs with gate lengths scaled down to 32 nm. The detected difference in the performance between the long and short channel devices could be for the most part attributed to transistor short channel effects. In addition, the effect of temperature on the device properties of Si:HfO2-based FeFETs was investigated in detail. The program/erase speed was ascertained to be independent of temperature. On the other hand, increase in temperature resulted in reduced initial memory window accompanied by its slightly accelerated decay with time.

Doped Hafnium Oxide – An Enabler for Ferroelectric Field Effect Transistors

Ferroelectrics are very interesting materials for nonvolatile data storage due to the fact that they deliver very low power programming operation combined with nonvolatile retention. For 60 years researchers have been inspired by these fascinating possibilities and have tried to build ferroelectric memory devices that can compete with mainstream technologies in their respective time. The progress of the current concepts is limited by the low compatibility of ferroelectrics like PZT with CMOS processing. Therefore, PZT or SBT based 1T1C ferroelectric memories are not scaling below 130 nm and 1T ferroelectric FETs based on the same materials are still struggling with low retention and very thick memory stacks. Hafnium oxide, a standard material in sub 45 nm CMOS, can show ferroelectric hysteresis with promising characteristics. By adding a few percent of silicon and annealing the films in a mechanically confined manner. Boescke et al. demonstrated ferroelectric hysteresis in hafnium oxide for the first time. Recently, a large number of dopants including Y, Al, Gd and Sr have been used to induce ferroelectricity in HfO2. This paper reviews the current status of hafnium oxide based ferroelectrics, its application to field effect transistors and puts this approach into a wider context of earlier developments in the field.

Switching Kinetics in Nanoscale Hafnium Oxide Based Ferroelectric Field-Effect Transistors

The recent discovery of ferroelectricity in thin hafnium oxide films has led to a resurgence of interest in ferroelectric memory devices. Although both experimental and theoretical studies on this new ferroelectric system have been undertaken, much remains to be unveiled regarding its domain landscape and switching kinetics. Here we demonstrate that the switching of single domains can be directly observed in ultrascaled ferroelectric field effect transistors. Using models of ferroelectric domain nucleation we explain the time, field and temperature dependence of polarization reversal. A simple stochastic model is proposed as well, relating nucleation processes to the observed statistical switching behavior. Our results suggest novel opportunities for hafnium oxide based ferroelectrics in nonvolatile memory devices.

Charge-Trapping Phenomena in HfO 2 -Based FeFET-Type Nonvolatile Memories

Ferroelectric field effect transistors (FeFETs) based on ferroelectric hafnium oxide (HfO2) thin films show high potential for future embedded nonvolatile memory applications. However, HfO2 films besides their recently discovered ferroelectric behavior are also prone to undesired charge trapping effects. Therefore, the scope of this paper is to verify the possibility of the charge trapping during standard operation of the HfO2-based FeFET memories. The kinetics of the charge trapping and its interplay with the ferroelectric polarization switching are analyzed in detail using the single-pulse ID-VG technique. Furthermore, the impact of the charge trapping on the important memory characteristics such as retention and endurance is investigated.

Origin of the endurance degradation in the novel HfO 2 -based 1T ferroelectric non-volatile memories

Novel HfO2-based non-volatile ferroelectric field effect transistors (FeFETs) reveal integration and scaling properties superior to the devices utilizing perovskite-type ferroelectrics. However, until now the switching endurance of only 104 program/erase cycles could be proven. The mechanisms responsible for the cycling degradation have been scarcely studied so far. Therefore, the scope of this paper is to clarify the origin of the cycling degradation in HfO2-based FeFETs. Several possible degradation mechanisms - fatigue of the ferroelectric layer and degradation of the transistor gate stack - are proposed and investigated. The limited endurance properties were found to be linked to the transistor gate stack reliability rather than to the ferroelectric material itself. The gate leakage current measurements and the trapping analyses presented in this paper identified a degradation of the interfacial layer in the gate stack, which in turn is strongly linked to a reduction of ferroelectric memory window.

HfO2-Based Ferroelectric Field-Effect Transistors with 260 nm Channel Length and Long Data Retention

We report the fabrication of highly scaled sub-0.3 μm ferroelectric field-effect transistors on the basis of ferroelectric HfO2. The electrical properties of 9 nm thick Si-doped HfO2 films depending on the silicon content and the annealing temperature were investigated. The most suitable fabrication conditions for the emergence of ferroelectricity were identified. The ferroelectric properties were verified up to temperatures of 170°C. N-channel MFIS-FETs (Metal-Ferroelectric-Insulator-Semiconductor Field-Effect Transistors) with poly-Si/TiN/Si:HfO2/SiO2/Si gate stack and channel lengths down to 260 nm were successfully fabricated. The switching characteristics, endurance and retention properties were analysed. Switching times of 10 ns were demonstrated. A memory window of 1.2 V was obtained with program/erase voltages of -6.5 V and +4 V and pulses as short as 50 ns. Endurance performance of up to 104 cycles was verified. Retention characteristics were measured at 25°C and 150°C. 10 years data retention was indicated for both temperatures by the extrapolation of the experimental data.

Downscaling ferroelectric field effect transistors by using ferroelectric Si-doped HfO 2

Throughout the 22 nm technology node HfO 2 is established as a reliable gate dielectric in contemporary complementary metal oxide semiconductor (CMOS) technology. The working principle of ferroelectric field effect transistors FeFET has also been demonstrated for some time, for dielectric materials like PZT and SrBi 2 Ta 2 O 9 . However, integrating these into contemporary downscaled CMOS technology nodes is not trivial due to the necessity of an extremely thick gate stack. Recent developments have shown HfO 2 to have ferroelectric properties given the proper doping. Moreover, these doped HfO 2 thin films only require layer thicknesses similar to the ones already in use in CMOS technology. This work will show how the incorporation of Si induces ferroelectricity in HfO 2 based capacitor structures and finally demonstrate non-volatile storage in nFeFETs down to a gate length of 100 nm.

SRAM read current variability and its dependence on transistor statistics

Our study breaks down the dependence of SRAM read current (I_read) variability (σI_read) into constituting pass-gate (PG) and pull down (PD) NMOS transistor variability. We report a bottoms-up model for σI_read including feedback in stacked transistors and discuss its implications on SRAM performance.