Renato Vaernewyck

40 Gb/s PAM-4 Transmitter IC for Long-Wavelength VCSEL Links

Conventional 850 nm multimode fiber links deployed in warehouse-scale data centers will be limited by modal dispersion beyond 10 Gb/s when covering distances up to 1 km. This can be resolved by opting for a single-mode fiber (SMF), but typically requires the use of power-hungry edge-emitting lasers. We investigate the feasibility of a high-efficiency SMF link by reporting a 0.13 μm SiGe BiCMOS laser diode driver optimized for long-wavelength vertical-cavity surface-emitting lasers (VCSELs). Bit-error rate experiments at 28 and 40 Gb/s up to 1 km of SMF reveal that four-level pulse amplitude modulation can compete with non-return-to-zero in terms of energy efficiency and scalability. With 9.4 pJ/b, the presented transmitter paves the way for VCSEL-based SMF links in data centers.

Silicon-organic hybrid (SOH) modulators for intensity-modulation / direct-detection links with line rates of up to 120 Gbit/s

High-speed interconnects in data-center and campus-area networks crucially rely on efficient and technically simple transmission techniques that use intensity modulation and direct detection (IM/DD) to bridge distances of up to a few kilometers. This requires electro-optic modulators that combine low operation voltages with large modulation bandwidth and that can be operated at high symbol rates using integrated drive circuits. Here we explore the potential of silicon-organic hybrid (SOH) Mach-Zehnder modulators (MZM) for generating high-speed IM/DD signals at line rates of up to 120 Gbit/s. Using a SiGe BiCMOS signal-conditioning chip, we demonstrate that intensity-modulated duobinary (IDB) signaling allows to efficiently use the electrical bandwidth, thereby enabling line rates of up to 100 Gbit/s at bit error ratios (BER) of 8.5 × 10-5. This is the highest data rate achieved so far using a silicon-based MZM in combination with a dedicated signal-conditioning integrated circuit (IC). We further show four-level pulse-amplitude modulation (PAM4) at lines rates of up to 120 Gbit/s (BER = 3.2 × 10-3) using a high-speed arbitrary-waveform generator and a 0.5 mm long MZM. This is the highest data rate hitherto achieved with a sub-millimeter MZM on the silicon photonic platform.

Multichannel 25 Gb/s Low-Power Driver and Transimpedance Amplifier Integrated Circuits for 100 Gb/s Optical Links

Highly integrated electronic driver and receiver ICs with low-power consumption are essential for the development of cost-effective multichannel fiber-optic transceivers with small form factor. This paper presents the latest results of a two-channel 28 Gb/s driver array for optical duobinary modulation and a four-channel 25 Gb/s TIA array suited for both NRZ and optical duobinary detection. This paper demonstrated that 28 Gb/s duobinary signals can be efficiently generated on chip with a delay-and-add digital filter and that the driver power consumption can be significantly reduced by optimizing the drive impedance well above 50 Ω, without degrading the signal quality. To the best of our knowledge, this is the fastest modulator driver with on-chip duobinary encoding and precoding, consuming only 652 mW per channel at a differential output swing of 6 Vpp. The 4 × 25 Gb/s TIA shows a good sensitivity of -10.3 dBm average optical input power at 25 Gb/s for PRBS 231-1 and low power consumption of 77 mW per channel. Both ICs were developed in a 130 nm SiGe BiCMOS process.

113Gb/s (10 x 11.3Gb/s) ultra-low power EAM driver array.

This paper presents an ultra-low power SiGe BiCMOS IC for driving a 10 channel electro-absorption modulator (EAM) array at 113Gb/s for wavelength division multiplexing passive optical network (WDM-PON) applications. With an output swing of 2.5V(pp), the EAM driver array consumes only 2.2W or 220mW per channel, 50% below the state of the art. Both the output swing and bias are configurable between 1.5 and 3.0V(pp) and 0.75-2.15V respectively.

Segmented Optical Transmitter Comprising a CMOS Driver Array and an InP IQ-MZM for Advanced Modulation Formats

Segmented Mach–Zehnder modulators are promising solutions to generate complex modulation schemes in the migration towards optical links with a higher-spectral efficiency. We present an optical transmitter comprising a segmented-electrode InP IQ-MZM, capable of multilevel optical signal generation (5-bit per I/Q arm) by employing direct digital drive from integrated, low-power (1W) CMOS binary drivers. We discuss the advantages and design tradeoffs of the segmented driver structure and the implementation in a 40 nm CMOS technology. Multilevel operation with combined phase and amplitude modulation is demonstrated experimentally on a single MZM of the device for 2-ASK-2PSK and 4-ASK-2-PSK, showing potential for respectively 16-QAM and 64-QAM modulation in future assemblies.

100 Gbit/s serial transmission using a silicon-organic hybrid (SOH) modulator and a duobinary driver IC

100 Gbit/s three-level (50 Gbit/s OOK) signals are generated using a silicon-organic hybrid modulator and a BiCMOS duobinary driver IC at a BER of 8.5×10⁻⁵(<10⁻²). We demonstrate dispersion-compensated transmission over 5 km.

Real-time 100 Gb/s NRZ-OOK transmission with a silicon photonics GeSi electro-absorption modulator

We demonstrate single-wavelength, serial and real-time 100 Gb/s NRZ-OOK transmission over 500 m SSMF with a GeSi EAM implemented on a silicon photonics platform. The device was driven with 2 Vpp without 50 Ω termination, allowing a low-complexity solution for 400 GbE short-reach optical interconnects.

Towards efficient 100 Gb/s serial rate optical interconnects: A duobinary way

Recent advances in integrated opto-electronic devices and front end circuits have made it possible to efficiently transmit very high data rates over optical links for HPC/datacenter applications. This paper reviews our current progress towards serial 100-Gb/s optical interconnects, with emphasis on electrical duobinary (EDB) modulation.

Adaptive Transmit-Side Equalization for Serial Electrical Interconnects at 100 Gb/s Using Duobinary

The ever-increasing demand for more efficient data communication calls for new, advanced techniques for high speed serial communication. Although newly developed systems are setting records, off-line determination of the optimal equalizer settings is often needed. Well-known adaptive algorithms are mainly applied for receive-side equalization. However, transmit-side equalization is desirable for its reduced linearity requirements. In this paper, an adaptive sign–sign least mean square equalizer algorithm is developed applicable for an analog transmit-side feed-forward equalizer (FFE) capable of transforming non-return-to-zero modulation to duobinary (DB) modulation at the output of the channel. In addition to the derivation of the update strategy, extra algorithms are developed to cope with the difficult transmit–receive synchronization. Using an analog six tap bit-spaced equalizer, the algorithm is capable of optimizing DB communication of 100Gb/s over 1.5-m Twin-Ax cable. Both simulations and experimental results are presented to prove the capabilities of the algorithm demonstrating automated determination of FFE parameters, such that error-free communication is obtained (BER

Performance evaluation of single carrier 40-Gbit/s downstream for long-reach passive optical networks

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