Richard A. Conti

Plasma-assisted chemical vapor deposition of dielectric thin films for ULSI semiconductor circuits

Plasma-assisted deposition of thin films is widely used in microelectronic circuit manufacturing. Materials deposited include conductors such as tungsten, copper, aluminum, transition-metal silicides, and refractory metals, semiconductors such as gallium arsenide, epitaxial and polycrystalline silicon, and dielectrics such as silicon oxide, silicon nitride, and silicon oxynitride. This paper reviews plasma-assisted chemical vapor deposition (CVD) applications and techniques for dielectric thin films. In particular, we focus on the integration, process, and reliability requirements for dielectric films used for isolation, passivation, barrier, and antireflectivecoating applications in ultralargescale integrated (ULSI) semiconductor circuits. In addition, manufacturing issues and considerations for further work are discussed.

Shallow Trench Isolation for the 45-nm CMOS Node and Geometry Dependence of STI Stress on CMOS Device Performance

In the present work, a high aspect ratio process (HARP) using a new O3/TEOS based sub atmospheric chemical vapor deposition process was implemented as STI gapfill in sub-65-nm CMOS. Good gapfill performance up to aspect ratios greater than 10:1 was demonstrated. Since the HARP process does not attack the STI liner as compared to HDP, a variety of different STI liners can be implemented. By comparing HARP with HDP, the geometry dependence of nand p-FET performance due to STI stress is discussed

Hardmask technology for sub-100-nm lithographic imaging

The importance of hardmask technology is becoming increasingly evident as the demand for high-resolution imaging dictates the use of ever-thinner resist films. An appropriately designed etch resistant hardmask used in conjunction with a thin resist can provide the combined lithographic and etch performance needed for sub-100 nm device fabrication. We have developed a silicon-based, plasma-enhanced chemical vapor deposition (PECVD) prepared material that performs both as an antireflective coating (ARC) and a hardmask and thus enables the use of thin resists for device fabrication. This ARC/hardmask material offers several advantages over organic bottom antireflective coatings (BARC). These benefits include excellent tunability of the materials optical properties, which allows superior substrate reflectivity control, and high etch selectivity to resist, exceeding 2:1. In addition, this material can serve as an effective hardmask etch barrier during the plasma etching of dielectric stacks, as the underlying silicon oxide etches eight times faster than this material in typical fluorocarbon plasma. These properties enable the pattering of features in 1-2 μm dielectric stacks using thin resists, imaging that would otherwise be impossible with conventional processing. Potential extendibility of this approach to feature sizes below 100nm has been also evaluated. High resolution images as small as 50nm, have been transferred into a 300nm thick SiO2 layer by using Si ARC/hardmask material as an etch mask. Lithographic performance and etch characteristics of a thin resist process over both single layer and index-graded ARC/hardmask materials will be shown.

Tunable antireflective coatings with built-in hard mask properties facilitating thin-resist processing

Patterning sub-150 nm features in dielectric stacks using single layer resist processes in conjunction with organic anti-reflective coatings (ARCs) is becoming very difficult. Typical organic ARC-open etch processes suffer from poor ARC-to-resist selectivities (~0.7), and are accompanied by critical dimension (CD) losses. The resist remaining is often not sufficient to prevent artifacts such as substrate microrevicing during subsequent etches. PECVD-Deposited titanium nitride and silicon oxynitride films have been investigated as ARC layers but their basic nature has caused residue formation at the resist/ARC interface. We have developed a PECVD-deposited material, TERA (Tunable Etch-Resistant ARC) that acts as an ARC at 248 nm and 193 nm wavelengths and provides excellent etch selectivity to resist surpassing those attained with organic ARCs. In addition, this material demonstrates excellent hard mask properties for subsequent dielectric etch steps. The optical properties of these films can be easily tuned to minimize substrate reflectance at either imaging wavelength by controlling the precursor composition and deposition conditions. The films are compatible with 248 nm and 193 nm resists - no footing, undercut or residue is observed during patterning. The films can be etched selectively to resist (selectivity ~2.5) that translates to less resist consumption during th ARC-open etch. Compared to resists, TERA demonstrates better etch resistance while patterning dielectric stacks - the silicon oxide-to-TERA Selectivity exceeds 8. In this paper, the excellent optical tunability and substrate reflectivity control achieved with TERA are discussed. Clean lithography using 248 nm, 193 nm and e- beam resists is shown. The etch characteristics of TERA in fluorocarbon and halogen-based plasma chemistries are discussed. Finally, the formation of 135 nm and 120 nm deep trench patterns in thick dielectric stacks using TERA in conjunction with commercial 248 nm and 193 nm resists, respectively is demonstrated. The extendability of this approach to pattern silicon without roughening or microrevicing using sub-200 nm thick resists is motivated.

Applications of computational fluid dynamics for improved performance in chemical‐vapor‐deposition reactors

Engineering models, based on computational fluid dynamics, have been developed and used to improve the performance of two metalorganic chemical‐vapor‐deposition reactors. Though the knowledge of the chemical reactions occurring during film deposition is incomplete, the models provide insight into the reactor’s performance and are useful in guiding reactor modifications. In one reactor, the effect of three gas injector designs on the film thickness uniformity is examined; in a second reactor, the shape and placement of a flow deflector, which redistributes the flow of gas over the wafer surface, is studied. In both cases, comparing the experimental results obtained both before and after the reactor modifications, significant improvements in film thickness uniformity were realized.

Study of silicon strain in shallow trench isolation

Raman spectroscopy has been used as a primary tool to measure silicon strain on shallow trench isolation (STI) test structures. Different STI dielectric gap fill materials have been evaluated as well as the effect of tensile and compressive STI liners on silicon strain. It has been shown that both intrinsic stress of thin film dielectric material and STI structure type affect strain in silicon. Ways of generating high stress in silicon are discussed including the effect of the STI chemical vapor deposition liner material on Si strain. Strain simulation data are found to be in reasonably good agreement with the active area silicon. Advantages and limitations of Raman based strain metrology in the semiconductor industry are delineated. The findings have been confirmed electrically on metal-oxide-semiconductor field effect transistor devices with tensile and compressive strains in the STI region. An improvement in p-type field-effect transistor performance has been demonstrated for silicon on insulator devic...

Characterization of bis(tertiary-butylamino)silane-based low-pressure chemical vapor deposition silicate glass films

The bis(tertiary-butylamino)silane-based low-pressure chemical vapor deposition (LPCVD) undoped silicate glass and phospho-silicate glass (PSG) processes were investigated to study film composition, etch rate, and step coverage. Through the addition of phosphorous doping, LPCVD PSG processing offers an attractive low temperature option. Enhanced deposition rate for the PSG process enables the lowering of the deposition temperature to the 400–500 °C range, thereby minimizing the thermal cycle and offering compatibility with many back-end-of-line processes. Many properties of these films are similar to those of the tetraethoxysilane (TEOS)-based LPCVD oxide. Differences in the film properties compared with the TEOS-based LPCVD oxide films can be traced to the composition of these films and the reaction mechanism.

Temperature distribution in an ideal azimuthally symmetric chemical‐vapor‐deposition reactor

The temperature distribution in an azimuthally symmetric chemical‐vapor‐deposition reactor is calculated at two pressure regimes. Taken into account is the influence of a silicon wafer situated above a uniformly heated susceptor. In the low‐pressure regime, where the mean free path in the gas phase is much greater than the separation between the wafer and susceptor, the wafer is heated solely by radiation. The temperature at the wafer surface can be ∼20% lower than the susceptor temperature and the temperature drop is nearly independent of the thermal conductivity of the surrounding gas. In the high‐pressure regime, where continuum flow exists between the susceptor and the wafer, the later is heated by conduction, convection, and radiation. The temperature at the wafer surface can be ∼10% lower than that of the susceptor and the temperature drop is strongly influenced by the distance separating the wafer and the susceptor, and by the thermal conductivity of the gas. In both pressure regimes, nonuniform te...