Richard Moseley
Freescale Semiconductor
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Publication
Featured researches published by Richard Moseley.
IEEE Transactions on Electromagnetic Compatibility | 2009
Jayong Koo; Lijun Han; Scott Herrin; Richard Moseley; Ross Carlton; Daryl G. Beetner; David Pommerenke
A nonlinear power distribution network model for characterizing the immunity of integrated circuits (ICs) to electrical fast transients (EFTs) is proposed and validated. The model includes electrostatic discharge (ESD) protection diodes and passive impedances between power domains. Model parameters are based on external measurements using a vector network analyzer and curve tracer. Impedance is measured between pins while the IC is biased and operating, and is used to determine individual elements of the network model. Inclusion of active power-clamp circuitry is also explored. The model is able to successfully predict pin currents and voltages during EFTs on the power pin when the IC is operating or turned off and when the ESD power clamp is either activated or not activated. This model might be used to evaluate the immunity of the IC in a variety of systems and to better understand why failures occur within the IC and how to fix them.
international symposium on electromagnetic compatibility | 2010
Ji Zhang; Jayong Koo; Daryl G. Beetner; Richard Moseley; Scott Herrin; David Pommerenke
Investigation of the immunity of ICs to EFTs is increasingly important. In this paper, an accurate model of a microcontroller is developed and verified. This model consists of two parts: a passive Power Distribution Network (PDN) model and an active I/O protection network model. Measurement methods are designed to extract the parameters of the passive PDN model. The accuracy of the overall model of the IC is verified using both S parameter tests and EFT injection tests. The model is able to accurately predict the voltage and current at power-supply and I/O pins and correctly accounts for the active components of the I/O protection network.
international symposium on electromagnetic compatibility | 2011
Ji Zhang; Daryl G. Beetner; Richard Moseley; Scott Herrin; David Pommerenke
IC designers require fast and accurate methods of simulating immunity of ICs to ESD events to adequately predict and analyze ESD issues. The common method of predicting electromagnetic field coupling from an ESD gun to an IC, however, requires substantial simulation time and does not typically account for the full IC layout. Here we propose an efficient methodology for calculating the electromagnetic field coupling from an ESD gun to an IC while fully considering the non-linear circuit elements in the IC core. Voltages and currents within the IC are found by merging full-wave simulations of an ESD gun with a SPICE model of the IC and the coupled electromagnetic energy. The capability of the proposed method was verified through experiments on a pseudo- integrated circuit structure. Results show the promise of the method. This hybrid modelling method can significantly accelerate simulation time compared with traditional full-wave modelling techniques and can allow the designer to better explore the variation in coupling that occurs with small changes in the test setup, such as the position and orientation of the gun and IC.
IEEE Transactions on Electromagnetic Compatibility | 2014
Ji Zhang; Jayong Koo; Richard Moseley; Scott Herrin; Xiang Li; David Pommerenke; Daryl G. Beetner
A SPICE-based model of a microcontroller was developed to investigate its immunity to electrical fast transients (EFTs). The model includes representations of the on-die power delivery network, the ESD protection clamps, and the I/O driver circuits. Several measurement approaches were developed to characterize the linear and nonlinear components within the model. EFTs were injected into pins of the microcontroller to verify the accuracy of the proposed model. General purpose I/O were tested in several configurations (i.e., pull-up-enabled input, logical-high output, and logical-low output). The model was able to predict the voltage waveform and maximum voltage at each pin within 5~6% of the measured values. A parasitic bipolar junction transistor associated with the output driver was found to have a critical impact on the noise coupled to the power bus. The simplicity and accuracy of this model shows its promise for understanding and predicting immunity issues in integrated circuits.
international symposium on electromagnetic compatibility | 2009
Eric Rogard; Bertrand Vrignon; John Shepherd; Richard Moseley; Etienne Sicard
This paper presents the electromagnetic emission (EME) characterization and modelling of a 32-bit microcontroller designed for automotive purposes. The effect of different ball grid array (BGA) packages is investigated in terms of parasitic emission and associated EME model in conducted and radiated modes. Good agreements between measurements and simulations demonstrate the ability of ICEM-based model to handle the emission prediction of complex micro-controllers mounted in high-density, high-performance BGA packages.
international soc design conference | 2010
Radu M. Secareanu; Olin L. Hartin; Jim Feddeler; Richard Moseley; John Shepherd; Bertrand Vrignon; Jian Yang; Qiang Li; Hongwei Zhao; Waley Li; Linpeng Wei; Emre Salman; Richard Wang; Dan Blomberg; Patrice M. Parris
External stresses, such as those generated due to Electrical Fast Transient (EFT) events, generate over-voltages which may result in reliability failures at the IClevel either in the form of recoverable or permanent damage of the IC. In the present paper, the relationship between the technology characteristics within a design framework and the permanent failures that such an EFT event can produce are discussed. Solutions to minimize the impact of such EFT events are presented.
IEEE Transactions on Electromagnetic Compatibility | 2014
Ji Zhang; Xiao Li; Richard Moseley; David Pommerenke; Daryl G. Beetner
High-strength electric and magnetic fields can capacitively or inductively couple energy to integrated circuits (ICs) and cause them to fail. While measurements can show when an IC will fail, they do not provide insight into the mechanisms for failure. Modeling the response of the IC to these fields is challenging, in part because of the small features of the IC and the large amount of circuitry information that must be included from the IC and printed circuit board. The goal of the following work is to develop a methodology for predicting the voltage or current on the pins of the IC from incident electric or magnetic fields. The method is based on measuring “coupling factors,” which show the relationship between a specific field component and the IC response. These coupling factors can be determined by placing the IC in a known electric or magnetic field within a transverse electromagnetic cell and measuring the response. The developed technique was validated by predicting the response of a commercially available 8-bit microcontroller to the electromagnetic fields generated by the nearby discharge of an electrostatic discharge gun. The proposed approach allows the prediction of the waveforms and a better understanding of failure mechanisms without the need to know or model IC geometry and circuitry.
Archive | 2014
Mario Rotigni; Richard Moseley; Piyush Bhatt; Gregory Edgington
Archive | 2013
Mario Rotigni; Richard Moseley; Piyush Bhatt; Gregory Edgington
IEEE Transactions on Electromagnetic Compatibility | 2018
Abhishek Patnaik; Mihir Suchak; Ramu Seva; Keerthana Pamidimukkala; Greg Edgington; Richard Moseley; James R. Feddeler; Michael Stockinger; David Pommerenke; Daryl G. Beetner