Robert Russell Williams

VLSI performance compensation for off-chip drivers and clock generation

A major problem in VLSI system design is controlling off-chip driver characteristics and skew in clock generation as process parameters, temperature, and supply voltage vary. A control circuit methodology has been developed that senses the relative performance of a CMOS chip and transmits a digitally encoded state to off-chip driver and clock generation circuits to control their operating characteristics

Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry ☆

Active clamp circuits are essential to minimize electrical overshoot and undershoot and minimize reflected signals and achieve performance objectives and reliability requirements in high performance CMOS circuits. This paper discusses for the first time the electrostatic discharge (ESD) protection circuits of silicon-on-insulator (SOI) active clamp networks, dynamic threshold MOSFET SOI ESD techniques and the synthesis of DTMOS concepts, ESD protection networks and active clamp circuitry for high-pin-count high-performance semiconductor chips.