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Dive into the research topics where Roland Irsigler is active.

Publication


Featured researches published by Roland Irsigler.


international conference on thermal, mechanical and multi-physics simulation and experiments in microelectronics and microsystems | 2009

Thermo-mechanical reliability assessment for 3D through-Si stacking

Rainer Dudek; Birgit Brämer; Roland Irsigler; Sven Rzepka; Bernd Michel

The through silicon interconnection technology for stacked dies is a promising way of future package construction as it lowers yield risks of large die sizes and allows cost effective packaging solutions for heterogeneous electronic systems. Thermo-mechanical reliability dependent on processing and mounting steps as well as during testing are one major concern, which was addressed by FEA. The numerical investigations addressed single through-Si vias of different sizes and geometrical features, effects of multiple vias and those of mounting through-silicon stacked dies in plastic packages. It is shown that appropriate modeling requires the inclusion of multiple high temperature process steps as well as non-linear material properties for miniaturized materials used, realized by submodeling and sequential build-up techniques. A computational time consuming 40 steps calculation scheme was selected to include intrinsic stress from processing in the final package under thermal cyclic loading. Thin film elastic-plastic behavior of metals, in particular of the Cu-via, was accounted for as measured by nano-indentation while polymeric materials were treated viscoelastically based on tensile measurements of miniaturized specimens.


Archive | 2002

Method for producing an electronic component having a plurality of chips that are stacked one above the other and contact-connected to one another

Gerd Frankowsky; Harry Hedler; Roland Irsigler; Thorsten Meyer; Barbara Vasquez


Archive | 2002

Method for connection of circuit units

Gerd Frankowsky; Harry Hedler; Roland Irsigler; Thorsten Meyer; Barbara Vasquez


Archive | 2008

Stacked Semiconductor Chips with Through Substrate Vias

Andreas Thies; Harry Hedler; Roland Irsigler


Archive | 2008

Semiconductor Device With an Interconnect Element and Method for Manufacture

Andreas Wolter; Harry Hedler; Roland Irsigler


Archive | 2008

INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING SAME

Harry Hedler; Roland Irsigler; Andreas Wolter


Archive | 2006

Solder pillar bumping and a method of making the same

Roland Irsigler; Harry Hedler


Archive | 2002

Process for producing a semiconductor chip

Harry Hedler; Roland Irsigler; Barbara Vasquez


Archive | 2008

Method for Manufacturing a Multichip Module Assembly

Harry Hedler; Roland Irsigler


Archive | 2009

Chip arrangement and method of manufacturing a chip arrangement

Harry Hedler; Roland Irsigler

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Jens Pohl

Infineon Technologies

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