Rolf Gerlach

High frequency power LDMOS technologies for base station applications status, potential, and benchmarking

LDMOS technologies based in G. Ma et al. (1996) and H. Brech et al. (2003) have been in dominate position in wireless base station applications for frequencies ranging from 450MHz to 2.7GHz for the last 10 years due to performance, cost, reliability, and power capability advantages. This paper reviews the leading edge LDMOS development at Infineon and discusses future potential and limitation for LDMOS technologies in general; benchmarking with alternative technologies is also presented

A New 1200V SiC MPS Diode with Improved Performance and Ruggedness

Infineon’s 5th Generation of 1200V SiC diodes uses a new compact chip design, realized by an optimized hexagonal merged-pn cell structure in the active area. This allows a higher n-doping in the epi layer due to improved E-field shielding resulting in a smaller differential resistance per chip area. Thanks to the merged-pn cell structure, depending on the diode ampere rating, a surge current capability now rated up to 14 times the nominal current ensures robust diode operation during surge current events in the application. The previous generations of 1200V SiC diodes could not make full use of the high breakdown field strength of the SiC material due to the instable avalanche which occurs at the edge termination only, and therefore, requiring a significant safety margin between rated voltage and breakdown voltage. Now the 5th Generation is designed in a way that each cell contributes to the avalanche, enabling a much more avalanche rugged device.

Current Distribution in the Various Functional Areas of a 600V SiC MPS Diode in Forward Operation

The forward current distribution in SiC 600V merged pn-Schottky (MPS) diodes is visualized with the help of emission microscopy at various current densities. It is shown how the light emission develops with increasing current densities and extends from the Schottky contact areas into the pn junction areas. Large p+-regions e.g. in the edge termination contribute first by minority carrier injection, whereas the smaller p+ hexagonal cells and the p+ grid follow subsequently.

Performance of a 650V SiC Diode with Reduced Chip Thickness

A significant performance gain of 650V SiC diodes is possible by reducing the wafer thickness from the standard thickness of 350 µm to < 150 µm. Not only the differential resistance of the diodes but also the Rth benefit from this chip thickness reduction. As consequence a further chip size reduction with accompanying capacitive charge reduction leads to a device with improved efficiency in PFC applications under both high load and low load conditions.

Laser backside contact annealing of SiC power devices: A prerequisite for SiC thin wafer technology

We developed a new backside contact formation process for SiC power devices based on pulsed laser annealing providing an ohmic contact with lower contact resistance and better adhesion properties than contacts formed by conventional rapid thermal annealing. This process does not add any significant thermal budget to the wafer front side and therefore allows a “short thin wafer” process, means completing the wafer front side including the imide process before thinning and backside metallization. By that means both the risk of wafer breakage and substrate contribution to the total device resistance are minimized at the same time. This is clearly shown by comparing 650V SiC Schottky diodes with identical device structure but different total chip thickness (360 vs 110 μm). Besides the advantage in differential resistance also other properties like heat flux through the device (Rth), non destructive surge current density (I2t) and reliability are improved by the SiC thin wafer technology enabled by the laser backside contact annealing.

A new SiC diode with significantly reduced threshold voltage

In this paper we introduce a new generation of silicon carbide (SiC) Schottky diodes with reduced threshold voltage. A detailed comparison with Infineons 5th generation of SiC diodes (G5) is done. With a Mo-based Schottky metal system, the new generation of diodes (G6) was designed in such a way that the increased reverse power loss is more than balanced by the efficiency gained by the low threshold voltage. Therefore, in spite of a higher reverse current, due to a lower Schottky barrier, it is shown that the efficiency of G6 is higher and the ohmic losses are reduced in comparison with G5 over a wide load range. G6 also demonstrates similar surge current capabilities as G5 and high ruggedness of the Schottky barrier.

Thermal Management versus Full Isolation: Trade Off in Packaging Technologies of Modern SiC Diodes

In this paper we compare the thermal behavior of identical SiC Schottky diodes mounted in i) a standard TO220 package (TO220) with non-isolated backside applying standard soft solder and diffusion solder die attach with ii) a so called FULLPAK TO220 package (TO220FP, only diffusion soldering). Depending on the solder technique the heat transport from the junction area of the SiC Schottky diode to the heat sink or to the package backside is improved for the diodes mounted via diffusion solder. For small chips this holds even for TO220FP in comparison to TO220 with standard solder. Simulations of the vertical temperature distribution after electrically heating with a half sine wave for 10ms up to 190W show a decrease of the maximal junction temperature of the SiC Schottky diode from TJ=260 °C to TJ=180 °C if the diffusion solder is used independent from the package type.

SiC MPS Devices: One Step Closer to the Ideal Diode

We report on the development of a new generation of SiC Schottky rectifier devices employing a Molybdenum based barrier metal system and a new stripe cell design for field shielding and optimized area utilization. The Schottky barrier height is reduced and thus the conduction losses are decreased significantly. The balance between forward conduction and reverse leakage losses as well as the homogeneity and stability of the new barrier system are investigated carefully.