Roy Yu

A 300-mm wafer-level three-dimensional integration scheme using tungsten through-silicon via and hybrid Cu-adhesive bonding

A 300-mm wafer-level three-dimensional integration (3DI) process using tungsten (W) through-silicon vias (TSVs) and hybrid Cu/adhesive wafer bonding is demonstrated. The W TSVs have fine pitch (5 mum), small critical dimension (1.5 mum), and high aspect ratio (17:1). A hybrid Cu/adhesive bonding approach, also called transfer-join (TJ) method, is used to interconnect the TSVs to a Cu BEOL in a bottom wafer. The process also features thinning of the top wafer to 20 mum and a Cu backside BEOL on the thinned top wafer. The electrical and physical properties of the TSVs and bonded interconnect are presented and show RLC values that satisfy both the power delivery and high-speed signaling requirements for high-performance 3D systems.

FinFET performance advantage at 22nm: An AC perspective

At the 22 nm node, we estimate that superior electrostatics and reduced junction capacitance in FinFETs may provide a 13~23% reduction in delay relative to planar FETs. However, this benefit is offset by enhanced gate-to-source/drain capacitance (Cgs) in FinFETs. Here, we measure FinFET Cgs capacitance at 22 nm-like dimensions and determine that, with optimization, the FinFET capacitance penalty can be limited to <6%, resulting in an overall advantage of up to 17% over a planar technology.

Looking into the crystal ball: future device learning using hybrid e-beam and optical lithography (Keynote Paper)

Semiconductor process development teams are faced with increasing process and integration complexity while the time between lithographic capability and volume production has remained more or less constant over the last decade. Lithography tools have often gated the volume checkpoint of a new device node on the ITRS roadmap. The processes have to be redeveloped after the tooling capability for the new groundrule is obtained since straight scaling is no longer sufficient. In certain cases the time window that the process development teams have is actually decreasing. In the extreme, some forecasts are showing that by the time the 45nm technology node is scheduled for volume production, the tooling vendors will just begin shipping the tools required for this technology node. To address this time pressure, IBM has implemented a hybrid-lithography strategy that marries the advantages of optical lithography (high throughput) with electron beam direct write lithography (high resolution and alignment capability). This hybrid-lithography scheme allows for the timely development of semiconductor processes for the 32nm node, and beyond. In this paper we will describe how hybrid lithography has enabled early process integration and device learning and how IBM applied e-beam & optical hybrid lithography to create the worlds smallest working SRAM cell.

High density 3D integration

This paper discusses the current and future needs in continued CMOS scaling, reviews the status of the transfer and joining (TJ) technology for MCM-D and wafer level 3DI integration, and explores the opportunities of the TJ technology in the realm of the ldquoMore than Moorerdquo era.

Nanopatterned Bulk Metallic Glass Biosensors

Nanopatterning as a surface area enhancement method has the potential to increase signal and sensitivity of biosensors. Platinum-based bulk metallic glass (Pt-BMG) is a biocompatible material with electrical properties conducive for biosensor electrode applications, which can be processed in air at comparably low temperatures to produce nonrandom topography at the nanoscale. Work presented here employs nanopatterned Pt-BMG electrodes functionalized with glucose oxidase enzyme to explore the impact of nonrandom and highly reproducible nanoscale surface area enhancement on glucose biosensor performance. Electrochemical measurements including cyclic voltammetry (CV) and amperometric voltammetry (AV) were completed to compare the performance of 200 nm Pt-BMG electrodes vs Flat Pt-BMG control electrodes. Glucose dosing response was studied in a range of 2 mM to 10 mM. Effective current density dynamic range for the 200 nm Pt-BMG was 10-12 times greater than that of the Flat BMG control. Nanopatterned electrode sensitivity was measured to be 3.28 μA/cm2/mM, which was also an order of magnitude greater than the flat electrode. These results suggest that nonrandom nanotopography is a scalable and customizable engineering tool which can be integrated with Pt-BMGs to produce biocompatible biosensors with enhanced signal and sensitivity.