Rudolf Berger
Infineon Technologies
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Featured researches published by Rudolf Berger.
Process, Equipment, and Materials Control in Integrated Circuit Manufacturing II | 1996
Rudolf Berger; Claus Schneider; Wolfgang Lehnert; Lothar Pfitzner; Heiner Ryssel
For the first time, a layer thickness sensor has been integrated into a vertical furnace for in situ sensing of the layer growth as well as for post process control of the batch. Because of its high accuracy and versatility, an in situ spectroscopic ellipsometer (SE) was selected. The adaption of the SE to the vertical furnace was performed with only minor modifications to the furnace geometry. The ellipsometer light beam is guided through the base plate into the furnace tube and directed onto the wafer by quartz glass prisms operated in total internal reflection (TIR) mode. This arrangement introduces an additional phase shift in the polarization state of the light which can be determined and subtracted from the measured phase shift. The ellipsometer setup is mechanically fixed to the boat loader. SE measurements therefore can be performed with the wafer boat out of the furnace tube as well as during the process run with the wafer boat inserted. The SE thus can be used for in situ end-point detection during layer growth and also for post process measurements on selected wafers of the batch during the unloading sequence. A realtime controller and a run-by-run controller integrated into the furnace controller utilize the layer thickness data measured in the in situ and in the post process mode, respectively, for immediate and automated correction of the parameter settings during the actual process run and for the following process run. The advantages of this novel furnace control system such as a reduction in time needed for process optimization, the avoidance of monitor wafers and a better control in integrated multilayer processing can be beneficial for future thermal batch/minibatch processing.
advanced semiconductor manufacturing conference | 2014
Thomas Popp; Rudolf Berger; Stefan Pompl
Trench etching is an important process step for many semiconductor applications. Memory implementations, power devices and embedded capacitors benefit from lateral shrinkage of trench dimensions. But for physical reasons the depth of a trench that can be achieved for a given diameter is limited. We describe here a process with a sacrificial Silicon-Germanium (SiGe) layer on the sidewall of a trench, that multiplies the number of trenches in a unit cell by five with a correspondent improvement of the aspect ratio, avoiding the difficulties of reactive ion etching.
Archive | 2014
Rudolf Berger; Hermann Gruber; Wolfgang Lehnert; Guenther Ruhl; Raimund Foerg; Anton Mauder; Hans-Joachim Schulze; Karsten Kellermann; Michael Sommer; Christian Rottmair; Roland Rupp
Archive | 2012
Anton Mauder; Franz Hirler; Wolfgang Lehnert; Rudolf Berger; Klemens Pruegl; Hans-Joachim Schulze; Helmut Strack
Archive | 2012
Anton Mauder; Rudolf Berger; Franz Hirler; Ralf Siemieniec; Hans-Joachim Schulze
Archive | 2015
Rudolf Berger; Guenther Ruhl; Wolfgang Lehnert; Roland Rupp
Archive | 2013
Guenther Ruhl; Wolfgang Lehnert; Rudolf Berger
Archive | 2013
Rudolf Berger; Hans-Joachim Schulze; Anton Mauder; Wolfgang Lehnert; Günther Ruhl; Roland Rupp
Archive | 2012
Carsten Ahrens; Rudolf Berger; Manfred Frank; Uwe Hoeckele; Bernhard Knott; Ulrich Krumbein; Wolfgang Lehnert; Berthold Schuderer; Juergen Wagner; Stefan Willkofer
Archive | 2008
Anton Mauder; Frank Pfirsch; Rudolf Berger; Stefan Sedlmaier; Wolfgang Lehnert; Raimund Foerg