Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Ruonan Wang is active.

Publication


Featured researches published by Ruonan Wang.


IEEE Electron Device Letters | 2011

Zero-Mask Contact Fuse for One-Time-Programmable Memory in Standard CMOS Processes

Min Shi; Jin He; Lining Zhang; Chenyue Ma; Xingye Zhou; Haijun Lou; Hao Zhuang; Ruonan Wang; Yongliang Li; Yong Ma; Wen Wu; Wenping Wang; Mansun Chan

This letter describes the formation of one-time-programmable (OTP) memory using standard contact fuse and polysilicon diode in a standard CMOS technology. Programming of the contact fuse is achieved by applying a high current pulse to destroy the contact. Compared with other existing OTP technologies, the proposed approach has the advantage of zero additional mask, no additional processing step, compact structure, and low programming voltage. The described OTP has been demonstrated in a 0.18-μm CMOS technology from TSMC with a cell size of 2.33 μm2 . The contact fuse can be programmed with a voltage of 3 V and a current of 2.4 mA.


international conference on electron devices and solid-state circuits | 2010

Variability investigation of gate-all-around silicon nanowire transistors from top-down approach

Ru Huang; Ruonan Wang; Jing Zhuge; Tao Yu; Yujie Ai; Chunhui Fan; Shuangshuang Pu; Jinbin Zou; Xian Huang; Yangyuan Wang

The gate-all-around (GAA) silicon nanowire transistor (SNWT) is considered as one of the best candidates for ultimately scaled CMOS devices. This paper discusses the process impact on nanowire LER/LWR, as well as the impact of 2D nanowire LER on performance variation and degradation. And it is found that SNWTs, which is immune to channel RDF(random dopant fluctuation), exhibit SDE-RDF which is enhanced by diameter-dependent annealing. In addition, the different impacts of the experimentally extracted variation sources in SNWTs on the threshold voltage and on current flucturation is discussed, as well as the variability impact on SNWT based SRAM cells compared with planar SRAM cells.


international soi conference | 2010

Self-heating effect and characteristic variability of gate-all-around silicon nanowire transistors for highly-scaled CMOS technology (invited)

Ru Huang; Ruonan Wang; Jing Zhuge; Tao Yu; Yujie Ai; Chunhui Fan; Shuangshuang Pu; Jinbin Zou; Yangyuan Wang

This paper discusses self-heating effect and variability behavior of GAA SNWTs. Due to the 1-D nature of nanowire and increased phononboundary scattering in GAA structure, the selfheating effect in SNWTs based on bulk substrate is comparable or even a little bit worse than SOI devices, which may limit the ultimate performance of SNWT-based circuits and thus special design consideration is expected. On the other hand, random variation has become a practical problem at nano-scale. The characteristic variability of SNWTs is experimentally extracted and studied in detail. And the impacts of nanowire LER, the diameter-dependent annealing enhanced nanowire This paper discusses self-heating effect and variability behavior of GAA SNWTs. Due to the 1-D nature of nanowire and increased phononboundary scattering in GAA structure, the selfheating effect in SNWTs based on bulk substrate is comparable or even a little bit worse than SOI devices, which may limit the ultimate performance of SNWT-based circuits and thus special design consideration is expected. On the other hand, random variation has become a practical problem at nano-scale. The characteristic variability of SNWTs is experimentally extracted and studied in detail. And the impacts of nanowire LER, the diameter-dependent annealing enhanced nanowire


international conference on electron devices and solid-state circuits | 2010

A compact model of diode array for Phase Change Memory

Yanmei Su; Laidong Wang; Ruonan Wang; X. Zhang; Yiqun Wei; Wei Wang; Yong Ma; Xinnan Lin; Jin He

In this paper, a compact diode array model for Phase Change Memory (PCM) application is presented. From the diode array structure and numerical simulation result, a quasi-physical compact model is proposed by combining the classical diode equation and simplified bipolar device formulation. This model results in accurate calculation of different leakage current components with parameter setting. Furthermore, the presented model is an open model structure, and can be applied in different fabrication process with the parameter extraction. All these characteristics make it useful in further study of physical mechanism of carrier transmissions in order to illustrate the device physics of such an array diode device.


Chinese Physics B | 2012

A nano-metallic-particles-based CMOS image sensor for DNA detection

Jin He; Yanmei Su; Yutao Ma; Qin Chen; Ruonan Wang; Yun Ye; Yong Ma; Hailang Liang

In this paper we report on a study of the CMOS image sensor detection of DNA based on self-assembled nano-metallic particles, which are selectively deposited on the surface of the passive image sensor. The nano-metallic particles effectively block the optical radiation in the visible spectrum of ordinary light source. When such a technical method is applied to DNA detection, the requirement for a special UV light source in the most popular fluorescence is eliminated. The DNA detection methodology is tested on a CMOS sensor chip fabricated using a standard 0.5 μm CMOS process. It is demonstrated that the approach is highly selective to detecting even a signal-base mismatched DNA target with an extremely-low-concentration DNA sample down to 10 pM under an ordinary light source.


IEEE Transactions on Electron Devices | 2012

A Compact CMOS Compatible Oxide Antifuse With Polysilicon Diode Driver

Jin He; Wan Tim Chan; Cheng Wang; Haijun Lou; Ruonan Wang; Lin Li; Hailang Liang; Wen Wu; Yun Ye; Yutao Ma; Qin Chen; Xiaomeng He; Mansun Chan


Journal of Computational and Theoretical Nanoscience | 2013

A Nonlinear Poisson-Schrodinger Solver Under Cylindrical Coordinate for Quantum Effect in Nanowire MOSFET

Lining Zhang; Jin He; Qin Chen; Yutao Ma; Ruonan Wang; Yong Ma; Wei Zhao; Mansun Chan; Aixin Chen


2016 International Conference on Electrical, Mechanical and Industrial Engineering | 2016

Analytical Model of Channel Electric Field Profile in FinFET

Ming Fang; Jin He; Wen Wu; Wei Zhao; Ruonan Wang; Mansun Chan; Ping He; Lei Song


2016 International Conference on Electrical, Mechanical and Industrial Engineering | 2016

FinFET Reliability Analysis by Forward Gated-Diode Method

Ming Fang; Jin He; Wen Wu; Wei Zhao; Ruonan Wang; Ping He; Lei Song


Journal of Computational and Theoretical Nanoscience | 2012

Parameter Extraction of Nano-Scale MOSFET by a Forward Gated-Diode Method

Chenfei Zhang; Min Shi; Zhenjuan Zhang; Lin Sun; Qiang Wang; Chenyue Ma; Xinjie Guo; Xiufang Zhang; Jin He; Qin Chen; Yun Ye; Yong Ma; Ruonan Wang; Hao Wang

Collaboration


Dive into the Ruonan Wang's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Mansun Chan

Hong Kong University of Science and Technology

View shared research outputs
Top Co-Authors

Avatar

Lining Zhang

Hong Kong University of Science and Technology

View shared research outputs
Top Co-Authors

Avatar

Wei Zhao

Chinese Academy of Sciences

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Qin Chen

Chinese Academy of Sciences

View shared research outputs
Researchain Logo
Decentralizing Knowledge