S. D. dos Santos

NW-TFET analog performance for different Ge source compositions

The analog performance of hetero-junction vertical NanoWire Tunnel FETs (NW-TFETs) with different Ge source compositions (27% and 46%) is studied and compared to Si source devices. Although the NW-TFETs with the highest amount of Ge at the source present the highest transconductance (lower bandgap and higher BTBT predominance), the NW-TFETs with 27% Ge source present a better intrinsic voltage gain (AV) due to their better output conductance (less drain electric field penetration than for 46%). The Si source NW-TFET presented the worst analog behavior at lower gate bias. However, when VGS increases, smaller is its AV degradation making it equal or better than the value obtained for SiGe source devices, since in the former the Trap Assisted Tunneling (TAT) is predominant. The peculiar NW-TFET low frequency noise behavior is also presented.

Temperature dependence of LF noise in UTBB nMOSFETs

The temperature influence on the low frequency noise performance has been investigated in Ultra-Thin Body and BOX (UTBB) nMOSFETs, with emphasis on the Lorentzian components. An Arrhenius analysis of the shift of the peak of the frequency versus the current noise power spectral density provides information on the underlying generation-recombination (GR) centers, whether they are positioned in the silicon film or in the top or bottom dielectric layer. Here, trap energy levels around 0.03 eV to 0.24 eV and cross-sections of 1×10-17 to 1×10-19 cm2 have been found, whereby the higher activation energies are found for the traps associated with the buried oxide.