S. Franchi

Electrical characterization of self-assembled InAs/GaAs quantum dots by capacitance techniques

Abstract The electrical characteristics of GaAs/InAs/GaAs structures containing self-assembled quantum dots (QD) or pseudomorphic layers (PSL) of InAs have been investigated by capacitance–voltage ( C – V ) measurements and deep-level transient spectroscopy (DLTS). The depth profiles of the apparent electron concentration obtained by C – V measurements show significant carrier depletion centered around the position of the InAs layer on both QD and PSL samples. In contrast, an accumulation peak, whose position depends on the temperature and the test signal frequency, is detected at low temperature only on QD samples. In addition to the M1, M3, and M4 traps, which are commonly detected in GaAs grown by molecular beam epitaxy (MBE), DLTS investigations show two InAs-related levels located at 60 and 480 meV below the GaAs conduction band edge. The shallower level, which is observed only on QD samples, is associated with an energy level induced by the dots. The deeper level, detected on both QD and PSL samples, is due to defects related to the InAs insertion. The influence of the above levels on the C – V characteristics is discussed.

The effect of InAs quantum layer and quantum dots on the electrical characteristics of GaAs structures

Abstract InAs monolayer (QL) and self-aggregated quantum dots (QD) were grown by atomic layer MBE at 460°C on an n-type GaAs-buffer layer and were capped with a 2×10 16 /cm 3 n-type GaAs layer. QDs significantly reduce the capacitance measured at 1 MHz compared to samples with QL, and the capacitance and conductance of QD samples exhibit strong frequency and temperature dependence. The I – V measurements show that single QDs are laterally coupled depending on the temperature. The fast defect transients measured in the 10 ns to 1 μs range show that the charge and discharge of QDs is similar to extended defects indicating that the broad peak in capacitance DLTS spectra cannot be interpreted as isolated point defects.

Growth and electrical characteristics of InAs/GaAs quantum well and quantum dot structures

The electrical characteristics of InAs quantum dot and quantum well structures embedded in GaAs confining layers have been compared and interpreted with the effect of the potential barrier and recharging processes of quantum dots and quantum well.

Current instabilities in GaAs/InAs self-aggregated quantum dot structures

Excess current was obtained in GaAs/InAs quantum dot structures at low temperatures and low current levels. This excess current exhibited instabilities with changing the bias, and over the time. It has been concluded that the excess current is a minority injection current connected with recombination through defects originated from the formation of QDs. The instabilities are connected with unstable occupation of energy levels induced by the above defects, which depend on temperature and on the current level.

Engineered Schottky barriers on n-In0.35Ga0.65As

The Schottky barrier height in Al/n-In 0 35 Ga 0.65 As was engineered using thin p-type near-interface In 0.35 Ga 0.65 As layers grown by molecular beam epitaxy. The effect of the thickness and doping level of the p-type layer on the barrier height was also studied by computer simulation. A good agreement was obtained between the calculated and experimental barrier height values. An experimental Schottky barrier height of 0.67 eV with an ideality factor of 1.15 has been achieved.

Influence of the As/Ga flux ratio on diffusion of Be in MBE GaAs layers

Beryllium (Be) diffusion after rapid thermal annealing experiments is studied in heavily doped GaAs structures grown by MBE. SIMS measurements show that in p/p + structures, Be diffusion is reduced by increasing the As 4 /Ga flux ratios. In contrast, no effect is observed in p/p + /p structures. Furthermore, Be concentration profiles measured after annealing experiments performed at 770 and 850°C for 30 s indicate that Be redistribution is almost independent of the annealing temperature. These results are discussed in terms of a substitutional interstitial diffusion mechanism.

Modeling of Be diffusion in GaAs layers grown by MBE

Beryllium diffusion is modeled in order to simulate the Be depth profiles obtained by SIMS measurements on p/p + and p/p + /p GaAs structures which underwent rapid thermal annealing (RTA) experiments at 850 °C for 30 s. The simulation procedure, which has been previously used to simulate Be and Zn diffusion in GaAs and in other related compounds, is critically discussed. It is shown that usual assumptions do not allow to simulate measured Be profiles in p/p + /p structures and that a qualitative agreement between measured and simulated Be profiles can be achieved in both p/p + and p/p + /p structures by considering proper initial conditions.