Vo Van Tuyen

Modification of Al/Si interface and Schottky barrier height with chemical treatment

The influence of different chemical treatments on the electrical behaviour of n- and p-type Al/Si Schottky junctions was studied. A Schottky barrier height of 0.91 eV was achieved on p-type Si probably due to the unpinning of the Fermi-level at the Al/Si interface. This is one of the highest barrier height values reported so far for a solid-state Schottky junction prepared to p-Si. A doping level reduction was observed in the vicinity of the Si surface for wafers with native oxide and for those boiled in acetone or annealed in forming gas. It was observed unexpectedly that the reactive plasma etch used for the formation of mesa structures decreases the apparent Schottky barrier height. The relation between the sum of n- and p-type Schottky barrier heights and forbidden gap is discussed.

Investigation of electrical properties of Au porous Si Si structures

Results of capacitance-voltage (C-V) and capacitance-time measurements performed on Au/porous silicon (PS)/Si diodes having different porosity and morphology of the obtained porous layer are presented. The C-V characteristics of the studied Au/PS/Si diodes are similar to those of poor metal-insulator-semiconductor capacitors. The porosity dependence of the «insulator» capacitance is interpreted by a model assuming two parallel phases. The results obtained indicate that the C-V measurements may be useful for checking (i) the long-term stability of the metal/PS/Si junctions, (ii) the lateral homogeneity of the wafers, and (iii) the thickness and porosity of the porous layer

The effect of InAs quantum layer and quantum dots on the electrical characteristics of GaAs structures

Abstract InAs monolayer (QL) and self-aggregated quantum dots (QD) were grown by atomic layer MBE at 460°C on an n-type GaAs-buffer layer and were capped with a 2×10 16 /cm 3 n-type GaAs layer. QDs significantly reduce the capacitance measured at 1 MHz compared to samples with QL, and the capacitance and conductance of QD samples exhibit strong frequency and temperature dependence. The I – V measurements show that single QDs are laterally coupled depending on the temperature. The fast defect transients measured in the 10 ns to 1 μs range show that the charge and discharge of QDs is similar to extended defects indicating that the broad peak in capacitance DLTS spectra cannot be interpreted as isolated point defects.

Growth and electrical characteristics of InAs/GaAs quantum well and quantum dot structures

The electrical characteristics of InAs quantum dot and quantum well structures embedded in GaAs confining layers have been compared and interpreted with the effect of the potential barrier and recharging processes of quantum dots and quantum well.

Anomalous temperature dependence of series resistance in Ag\Si and Al\Si Schottky junctions

Abstract Recently high temperature dependence of series resistance was obtained in Ag\n -Si and Al\ n-Si\p-Si Schottky junctions prepared by ionised cluster beam deposition and by plasma immersion implantation, respectively. In this work it is shown by experiments that this feature was due to the poor quality of backside ohmic contacts.

Tunneling in planar‐doped barrier diodes

The effect of the thermionic‐field emission mechanism on the I‐V characteristics of planar‐doped barrier diodes is investigated. The regions of temperature and of structural dimensions are given where this effect appears. The differences due to the different shapes of the potential barrier are pointed out between planar‐doped barrier diodes and Schottky diodes.

Current instabilities in GaAs/InAs self-aggregated quantum dot structures

Excess current was obtained in GaAs/InAs quantum dot structures at low temperatures and low current levels. This excess current exhibited instabilities with changing the bias, and over the time. It has been concluded that the excess current is a minority injection current connected with recombination through defects originated from the formation of QDs. The instabilities are connected with unstable occupation of energy levels induced by the above defects, which depend on temperature and on the current level.

Engineered Schottky barriers on n-In0.35Ga0.65As

The Schottky barrier height in Al/n-In 0 35 Ga 0.65 As was engineered using thin p-type near-interface In 0.35 Ga 0.65 As layers grown by molecular beam epitaxy. The effect of the thickness and doping level of the p-type layer on the barrier height was also studied by computer simulation. A good agreement was obtained between the calculated and experimental barrier height values. An experimental Schottky barrier height of 0.67 eV with an ideality factor of 1.15 has been achieved.

I-V characterisation of resonant tunneling diodes

The current-voltage characteristics of AlAs/GaAs resonant tunnelling diodes are measured in steady state circumstances and by a new method in the submicrosecond time scale. The results show that I-V characteristics are sensitive to the measuring time due to internal transient of the device. The internal transients are identified as thermal transients and as charge accumulation at the barriers and in localised electronic states. It is concluded that a reliable I-V characterisation of these devices is possible only when the results measured by different methods is compared and analysed properly.

Electrical characterization of Au/SiOx/n-GaAs junctions

The electrical behavior of Au/SiOx/n-GaAs Schottky structures has been studied using a statistical approach. II has been concluded that the obtained unusual electrical behavior is connected mainly with different Fermi-level pinning position and lateral microinhomogeneities of the barrier height induced by different average thickness of the SiOx interlayer along the wafer. The results of cross-sectional transmission electron microscopy and the temperature dependence of the electrical characteristics confirm this conclusion