S. S. Cohen

Contact resistance and methods for its determination

Abstract The problem of low resistance ohmic contacts to silicon has been of considerable technological interest. In recent years this problem has received special attention owing to the effect of scaling in very-large-scale integration (VLSI) technology. The field of ohmic contacts to semiconductors comprises two independent parts. First there exists the material science aspect. The choice of a suitable metallization system, the proper semiconductor parameters and the method of the contact formation is not obvious. Then there is the question of the proper definition of the contact resistance and the way it is measured. Several methods for contact resistance determination have been introduced in the past. All seem to have some drawbacks that either limit their usefulness or raise doubts as to their validity in certain situations. We shall discuss the two-, three- and four-terminal resistor methods of measurement. Relevant theoretical considerations will also be included. For conventional integrated circuits with a moderate junction depth of 1–2 μm, aluminum is uniquely suited as a single-element metallization system. However, for VLSI applications it may become obsolete because of several well-defined metallurgical problems. Thus, other metallization systems have to be investigated. We shall briefly discuss some recent data on several other metallization systems. Finally, the problem of size effects on the contact resistance will be discussed. Recent experimental results suggest important clues regarding the development of alternative metallization systems for VLSI circuits and also point to revisions of estimates of achievable design rules.

Platinum silicide ohmic contacts to shallow junctions in silicon

Ohmic contact to shallow pn+ and np+ junctions in silicon were studied. Thin layers (∼200 A) of platinum were sputter deposited and reacted with the silicon substrate at 590 °C to result in the stable PtSi silicide. In a self‐registered process, aqua regia was used to etch the unreacted platinum. An Al‐0.9% Si alloy has been used for final metallization. A small contact area of 3×3 μm2 was chosen so as to be in accordance with the current level of integration. A four‐terminal Kelvin‐resistor structure has been utilized to accurately measure the contact resistance. The effect due to the dopant concentration was studied at the implant dose range of 1–8×1015 cm−2. Van der Pauw sheet resistance measurements, secondary ion mass spectroscopy, and Rutherford backscattering experiments were all performed in order to characterize the shallow junctions and the silicide‐silicon interface. Predeposition and in‐situ etching resulted in considerable improvement in the measured specific contact resistance. Values well w...

Shallow boron‐doped junctions in silicon

Shallow boron‐doped junctions in silicon have been investigated by means of secondary ion mass spectrometry, scanning electron microscopy, transmission electron microscopy, spreading resistance profiling, and four‐point probe techniques. The junctions were formed by implanting BF+2 ions into n‐type Si at the dose range of 1–5×1015 ions/cm2, through a thin (25‐nm) screen layer of silicon dioxide. We have emphasized the higher dose range (3–5×1015 ions/cm2) as it is more relevant to processes in the current level of device integration. The use of BF+2 species and the screen oxide layer is necessary in order to form junctions whose depths xj≤0.4 μm, when conventional annealing techniques are employed. We have also examined junctions that were activated in a rapid thermal annealing system that utilizes an incoherent light source. One of the main objectives of this study is to compare conventional and rapid thermal annealing techniques. We thus evaluate the results obtained by these two methods of annealing fo...

Direct W–Ti contacts to silicon

We have studied the contact resistance in a metallization system that employs a direct contact between a tungsten–titanium alloy and shallow junctions in silicon. The values obtained in the present study are all within acceptable limits (<100 Ω μm2) for very large scale integration applications. The metal–silicon system has been subjected to moderate heat treatments, similar to those required in processing two‐level metallization schemes. No detrimental effects on the electrical properties of these contacts have been observed.

Inhibition of acid etching of Pt by pre‐exposure to oxygen plasma

Platinum etching characteristics in aqua regia have been studied. It was found that prior exposure to an oxygen plasma inhibits the dissolution of platinum in aqua regia. Oxygen, far more abundant in the exposed platinum than in the unexposed platinum, plays a key role in forming an inhibition layer, such as PtO2, which prevents chlorine ion attack. This inhibition layer appears to retard platinum etching effectively in chlorine‐based etch solutions. The layer has been observed to form at a fast rate, and it is insensitive to the oxygen partial pressure in the plasma chamber. The insoluble characteristics of both the inhibited platinum and the platinum silicide in aqua regia make it feasible to form an unframed contact interconnection for applications of very large scale integration.

Direct molybdenum contacts to silicon

Stringent requirements on the electrical and metallurgical properties of metallization systems for use in advanced, very large scale integrated circuits have created the need to study new metal‐silicon systems. We have conducted a study of the Mo/Si direct contact system. The choice of molybdenum stems from its desirable electrical and metallurgical properties. To date, however, its contact properties to silicon were not examined in detail. Results of the present study show that Mo can result in low resistivities (<5 Ω μm2) for both contacts to heavily doped p+‐Si and n+‐Si, provided appropriate care is taken in opening the contact windows. Further, we found the Mo/Si contact system to be stable under extended heat treatments at temperatures of up to 650 °C.

Space-charge-limited currents in materials with nonlinear velocity-field relationships

A general parametric form of the current-voltage characteristic of space-charge-limited currents (SCLC) is derived in the virtual cathode approximation. The result is used to obtain several new exact solutions for the trap-free insulator that is characterized by a nonlinear velocity-field (ν - F) relationship. Unlike previously reported results, the new solutions describe the gradual transition from the regime of constant mobility to that of the field-independent drift velocity. The first- and second-order corrections to the Mott-Gurney law then are obtained in a closed form for an important class of velocity-field relationships. Exact solutions are also Obtained for ν - F models that exhibit negative differential mobility behavior. The theory developed in this work is in good agreement with existing experimental data. The general result is used to specify the Condition that allows us to extract the anode field as well as the ν - F dependence from experimental current-voltage characteristics without assuming any a priori ν - F relation. In particular, such extraction is possible for the ideal trap-free insulator or materials with shallow traps. We illustrate the new approach by utilizing available experimental data to extract the ν - F dependence in GaAs.

Effect of gettering on leakage current in shallow junctions

Shallow junctions in silicon, which have been subjected to a threshold adjust implant, show an increase of leakage current unless annealed at a high temperature. In very large scale integration technology, a high‐temperature treatment is not desirable. We have found that a backside gettering treatment of the As and P implanted junctions allows the annealing temperature of threshold control implantation to be reduced from 1100 to 950 °C, while maintaining a low level of leakage current density.

On the nonequilibrium capacitance of the Schottky diode

A general type of the boundary condition given by Simmons and Taylor is used to derive the expression for the nonequilibrium capacitance of the Schottky diode. It is shown that the deviation of the capacitance from its quasi‐equilibrium value is larger than has been previously reported. Except for the extremely strong forward biases the quasi‐equilibrium capacitance remains a valid approximation.

Platinum silicide contacts to silicon by lift‐off

Thin layers of platinum silicide, interposed between heavily doped silicon junctions and a thick overlying interconnect metallization, assure that good ohmic contact characteristics prevail. In conventional processes the thin PtSi film is formed by reacting a thin (200–500 A) sputtered Pt film with the underlying silicon substrate. The unreacted platinum that is found on the surrounding field oxide area is then etched in aqua regia. This self‐aligned process may pose some problems with regard to the integrity of the Pt/Si contact and the device yield. For these reasons we have studied an alternative Pt deposition‐patterning scheme that promises to alleviate the seriousness of these problems. PtSi contacts have been fabricated by means of a new photoresist lift‐off technique. The aim of the present study is to contrast this new lift‐off process for the formation of PtSi contacts to Si with the conventional self‐aligned technique. Our results indicate that the new process is preferred although it gives rise...