Mario Ghezzo

Silicon carbide UV photodiodes

SiC photodiodes were fabricated using 6 H single-crystal wafers. These devices have excellent UV responsivity characteristics and very low dark current even at elevated temperatures. The reproducibility is excellent and the characteristics agree with theoretical calculations for different device designs. The advantages of these diodes are that they will operate at high temperatures and are responsive between 200 and 400 nm and not responsive to longer wavelengths because of the wide 3-eV bandgap. The responsivity at 270 nm is between 70% and 85%. Dark-current levels have been measured as a function of temperature that are orders of magnitude below those previously reported. Thus, these diodes can be expected to have excellent performance characteristics for detection of low light level UV even at elevated temperatures. >

Al and B ion‐implantations in 6H‐ and 3C‐SiC

Low (keV) and high (MeV) energy Al and B implants were performed into n‐type 6H‐ and 3C‐SiC at both room temperature and 850 °C. The material was annealed at 1100, 1200, or 1400 °C for 10 min and characterized by secondary ion mass spectrometry, Rutherford backscattering (RBS), photoluminescence, Hall and capacitance‐voltage measurement techniques. For both Al and B implants, the implant species was gettered at 0.7 Rp (where Rp is the projected range) in samples implanted at 850 °C and annealed at 1400 °C. In the samples that were amorphized by the room temperature implantation, a distinct damage peak remained in the RBS spectrum even after 1400 °C annealing. For the samples implanted at 850 °C, which were not amorphized, the damage peak disappeared after 1400 °C annealing. P‐type conduction is observed only in samples implanted by Al at 850 °C and annealed at 1400 °C in Ar, with 1% dopant electrical activation.

A comparative evaluation of new silicon carbide diodes and state-of-the-art silicon diodes for power electronic applications

Recent progress in silicon carbide (SiC) material has made it feasible to build power devices of reasonable current density. This paper presents recent results including a comparison with state-of-the-art silicon diodes. Switching losses for two silicon diodes (a fast diode, 600 V, 50 A, 60 ns Trr), an ultra-fast silicon diode (600 V, 50 A, 23 ns Trr) and a 4H-SiC diode (600 V, 50 A) are compared. The effect of diode reverse recovery on the turn-on losses of a fast WARP/sup TM/ IGBT are studied both at room temperature and at 150/spl deg/C. At room temperature, SiC diodes allow a reduction of IGBT turn-on losses by 25% compared to ultra-fast silicon diodes and by 70% compared to fast silicon diodes. At 150/spl deg/C junction temperature, SiC diodes allow a turn-on loss reduction of 35% and 85% compared to ultra-fast and fast silicon diodes respectively. The silicon and SiC diodes are used in a boost power converter with the WARP/sup TM/ IGBT to assess the overall effect of SiC diodes on the power converter characteristics. Efficiency measurements at light load (100 W) and full load (500 W) are reported. Although SiC diodes exhibit very low switching losses, their high conduction losses due to the high forward drop dominate the overall losses, hence reducing the overall efficiency. Since this is an ongoing development, it is expected that future prototypes will have improved forward characteristics.

SiC MOS interface characteristics

It is well known that SiC can be thermally oxidized to form SiO/sub 2/ layers. And Si MOSFET ICs using thermally grown SiO/sub 2/ gate dielectrics are the predominant IC technology in the world today. However the SiC/SiO/sub 2/ interface has not been well characterized as was the case for Si MOS in the early 1960s. This paper presents data which for the first time characterizes the SiC/SiO/sub 2/ interface and explains one of the previously unexplained abnormalities observed in the characteristics of SiC MOSFETs. >

Nitrogen-implanted SiC diodes using high-temperature implantation

6H-SiC diodes fabricated using high-temperature nitrogen implantation up to 1000 degrees C are reported. Diodes were formed by RIE etching a 0.8- mu m-deep mesa across the N/sup +//P junction using NF/sub 3//O/sub 2/ with an aluminum transfer mask. The junction was passivated with a deposited SiO/sub 2/ layer 0.6 mu m thick. Contacts were made to N/sup +/ and P regions with thin nickel and aluminum layers, respectively, followed by a short anneal between 900 and 1000 degrees C. These diodes have reverse-bias leakage at 25 degrees C as low as 5*10/sup -11/ A/cm/sup 2/ at 10 V.<<ETX>>

Silicon carbide MOSFET technology

Abstract The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperature SiC ICs will be described. These activities resulted in the design, fabrication and demonstration of the worlds first SiC analog IC—a monolithic MOSFET operational amplifier. Research tasks required for the development of a planar SiC MOSFET IC technology included: characterization of the SiCSiO2 interface using thermally grown oxides; high temperature (350°C) reliability studies of thermally grown oxides; ion implantation studies of donor (N) and acceptor (B) dopants to form junction diodes; epitaxial layer characterization; device isolation methods; and finally integrated circuit design, fabrication and testing of the worlds first monolithic SiC operational amplifier IC. High temperature circuit drift instabilities at 350°C were characterized. These studies defined an SiC depletion model MOSFET IC technology and outlined tasks required to improve all types of SiC devices.

Phosphorus and boron implantation in 6H–SiC

Phosphorus and boron ion implantations were performed at various energies in the 50 keV–4 MeV range. Range statistics of P+ and B+ were established by analyzing the as-implanted secondary ion mass spectrometry depth profiles. Anneals were conducted in the temperature range of 1400–1700 °C using either a conventional resistive heating ceramic processing furnace or a microwave annealing station. The P implant was found to be stable at any annealing temperature investigated, but the B redistributed during the annealing process. The implant damage is effectively annealed as indicated by Rutherford backscattering measurements. For the 250 keV/1.2×1015 cm−2 P implant, annealed at 1600 °C for 15 min, the measured donor activation at room temperature is 34% with a sheet resistance of 4.8×102 Ω/□. The p-type conduction could not be measured for the B implants.

Boron‐implanted 6H‐SiC diodes

Ion implanted planar p‐n junctions are important for silicon carbide discrete devices and integrated circuits. Conversion to p‐type of n‐type 6H‐SiC was observed for the first time using boron implantation. Diodes were fabricated with boron implants at 25 and 1000 °C, followed by 1300 °C post‐implant annealing in a furnace. The best diodes measured at 21 °C exhibited an ideality factor of 1.77, reverse bias leakage of 10−10 A/cm2 at −10 V, and a record high (for a SiC‐implanted diode) breakdown voltage of −650 V.

Material and n-p junction properties of N-, P-, and N/P-implanted SiC

Elevated temperature (ET) multiple energy N, P, and N/P implantations were performed into p-type 6H-SiC epitaxial layers. For comparison, room temperature (RT) N and P implantations were also performed. In the N/P coimplanted material a sheet resistance of 2.1×102 Ω/□ was measured, which is lower compared to the values measured in N or P implanted material of the same net donor dose. The RT P implantation resulted in heavy lattice damage and consequently low P electrical activation, even after 1600 °C annealing. After annealing the Rutherford backscattering yield either coincided or came close to the virgin level for ET implantations and RT N implantation, whereas for RT P implantation the yield was high, indicating the presence of high residual damage. Vertical n-p junction diodes were made by selective area ET N, P, and N/P implantations and RT N and P implantations using a 2.5 μm thick SiO2 layer as an implant mask. The diodes were characterized by capacitance–voltage and variable temperature current–v...

Al, Al/C and Al/Si implantations in 6H-SiC

Multiple-energy Al implantations were performed with and without C or Si coimplantations into 6H-SiC epitaxial layers and bulk substrates at 850°C. The C and Si co-implantations were used as an attempt to improve Al acceptor activation in SiC. The implanted material was annealed at 1500, 1600, and 1650°C for 45 min. The Al implants are thermally stable at all annealing temperatures and Rutherford backscattering via channeling spectra indicated good lattice quality in the annealed Al-implanted material. A net hole concentration of 8 × 1018 cm−3 was measured at room temperature in the layers implanted with Al and annealed at 1600°C. The C or Si co-implantations did not yield improvement in Al acceptor activation. The co-implants resulted in a relatively poor crystal quality due to more lattice damage compared to Al implantation alone. The out-diffusion of Al at the surface is more for 5Si co-implantation compared to Al implant alone, where 5Si means a Si/Al dose ratio of 5.