S.S. Frank

Datasheet Driven Silicon Carbide Power MOSFET Model

A compact model for SiC Power MOSFETs is presented. The model features a physical description of the channel current and internal capacitances and has been validated for dc, CV, and switching characteristics with measured data from a 1200-V, 20-A SiC power MOSFET in a temperature range of 25°C to 225°C. The peculiar variation of on-state resistance with temperature for SiC power MOSFETs has also been demonstrated through measurements and accounted for in the developed model. In order to improve the user experience with the model, a new datasheet driven parameter extraction strategy has been presented which requires only data available in device datasheets, to enable quick parameter extraction for off-the-shelf devices. Excellent agreement is shown between measurement and simulation using the presented model over the entire temperature range.

A multi-channel ADC for use in the PHENIX detector

A custom CMOS analog to digital converter was designed and a prototype 8-channel ADC ASIC was fabricated in a 1.2 /spl mu/m process. The circuit uses a Wilkinson-type architecture which is suitable for use in multi-channel applications such as the PHENIX detector. The ADC design features include a differential positive-ECL input for the high speed clock and selectable control for 11 or 12-bit conversions making it suitable for use in multiple PHENIX subsystems. Circuit topologies and ASIC layout specifics, including power consumption, maximum clock speed, INL, and DNL are discussed. The ADC performed to 11-bit accuracy.

A 4H Silicon Carbide Gate Buffer for Integrated Power Systems

A gate buffer fabricated in a 2-μm 4H silicon carbide (SiC) process is presented. The circuit is composed of an input buffer stage with a push-pull output stage, and is fabricated using enhancement mode N-channel FETs in a process optimized for SiC power switching devices. Simulation and measurement results of the fabricated gate buffer are presented and compared for operation at various voltage supply levels, with a capacitive load of 2 nF. Details of the design including layout specifics, simulation results, and directions for future improvement of this buffer are presented. In addition, plans for its incorporation into an isolated high-side/low-side gate-driver architecture, fully integrated with power switching devices in a SiC process, are briefly discussed. This letter represents the first reported MOSFET-based gate buffer fabricated in 4H SiC.

A detector for neutron imaging

A bright neutron source such as the Spallation Neutron Source (SNS) places extreme requirements on detectors including excellent 2-D spatial imaging and high dynamic range. Present imaging detectors have either shown position resolutions that are less than acceptable or they exhibit excessive paralyzing dead times due to the brightness of the source. High neutron detection efficiency with good neutron-gamma discrimination is critical for applications in neutron scattering research where the usefulness of the data is highly dependent on the statistical uncertainty associated with each detector pixel.. A detector concept known as MicroMegas (MicroMEsh GAseous Structure) has been developed at CERN in Geneva for high-energy physics charged-particle tracking applications and has shown great promise for handling high data rates with a rather low-cost structure. We are attempting to optimize the MicroMegas detector concept for thermal neutrons and have designed a 1-D neutron strip detector which we have tested In addition, we are performing research into the compatibility of various converter coatings. Our goal is to develop a manufacturable detector that could be scaled to a 1m/sup 2/, 2-D array for use at the SNS and other facilities.

A wide bandgap silicon carbide (SiC) gate driver for high-temperature and high-voltage applications

Limitations of silicon (Si) based power electronic devices can be overcome with Silicon Carbide (SiC) because of its remarkable material properties. SiC is a wide bandgap semiconductor material with larger bandgap, lower leakage currents, higher breakdown electric field, and higher thermal conductivity, which promotes higher switching frequencies for high power applications, higher temperature operation, and results in higher power density devices relative to Si [1]. The proposed work is focused on design of a SiC gate driver to drive a SiC power MOSFET, on a Cree SiC process, with rise/fall times (less than 100 ns) suitable for 500 kHz to 1 MHz switching frequency applications. A process optimized gate driver topology design which is significantly different from generic Si circuit design is proposed. The ultimate goal of the project is to integrate this gate driver into a Toyota Prius plug-in hybrid electric vehicle (PHEV) charger module. The application of this high frequency charger will result in lighter, smaller, cheaper, and a more efficient power electronics system.

Single-board computer based control system for a portable Raman device with integrated chemical identification

We report the development of a battery-powered portable chemical identification device for field use consisting of an acousto-optic tunable filter (AOTF)-based Raman spectrometer with integrated data processing and analysis software. The various components and custom circuitry are integrated into a self-contained instrument by control software that runs on an embedded single-board computer (SBC), which communicates with the various instrument modules through a 48-line bidirectional TTL bus. The user interacts with the instrument via a touch-sensitive liquid crystal display unit (LCD) that provides soft buttons for user control as well as visual feedback (e.g., spectral plots, stored data, instrument settings, etc.) from the instrument. The control software manages all operational aspects of the instrument with the exception of the power management module that is run by embedded firmware. The SBC-based software includes both automated and manual library searching capabilities, permitting rapid identificati...

A UVLO Circuit in SiC Compatible With Power MOSFET Integration

The design and test of the first undervoltage lock-out circuit implemented in a low-voltage 4H silicon carbide process capable of single-chip integration with power MOSFETs is presented. The lock-out circuit, a block of the protection circuitry of a single-chip gate driver topology designed for use in a plug-in hybrid vehicle charger, was demonstrated to have rise/fall times compatible with a MOSFET switching speed of 250 kHz while operating over the targeted operating temperature range between 0°C and 200°C. Captured data show the circuit to be functional over a temperature range from -55°C to 300°C. The design of the circuit and test results is presented.

ASIC for Small Angle Neutron Scattering Experiments at the SNS

We present an ASIC for a 3He gas detector to be used in small angle neutron scattering experiments at the Spallation Neutron Source in Oak Ridge. The ASIC is composed of 64 channels with low noise charge amplification, filtering, timing and amplitude measurement circuits, where an innovative current-mode peak-detector and digitizer (PDAD) is adopted. The proposed PDAD provides at the same time peak detection and A/D conversion in real time, at low power, and without requiring a clock signal. The channels share an efficient data sparsification and derandomization scheme, a 30-bit 256 deep FIFO, and low voltage differential signaling.

A 32-channel preamplifier chip for the multiplicity vertex detector at PHENIX

The TGV32, a 32-channel preamplifier–multiplicity discriminator chip for the multiplicity vertex detector (MVD) at PHENIX, is a unique silicon preamplifier in that it provides both an analog output for storage in an analog memory and a weighted summed-current output for conversion to a channel multiplicity count. The architecture and test results of the chip are presented. Details about the design of the preamplifier, discriminator, and programmable digital–analog converters performance as well as the process variations are presented. The chip is fabricated in a 1.2 μm, n-well, complementary metal–oxide–semiconductor process.

A configurable CMOS voltage DAC for multichannel detector systems

A CMOS voltage DAC has been developed for integration into multiple front-end electronics ASICs associated with the PHENIX detector located at the RHIC accelerator of Brookhaven National Laboratory. The topology allows wide-range output programmability by selection of an offset voltage and on-chip resistor and transistor sizing. The DAC is trimless and requires no external components, making it ideal for highly integrated collider detector systems. Errors associated with on-chip bias are minimized using a topology that implements a ratiometric relationship which compensates for absolute resistance value changes and is limited only by errors in the on-chip matching of MOSFETs and resistive devices. Temperature-induced errors associated with the integrated resistors are also minimized by the circuit topology and monolithic construction. All reference voltages and currents are derived using a single regulated voltage supply. This paper presents the general DAC architecture and design method, discusses on-chip matching issues and tradeoffs associated with device sizing and monolithic layout, and presents measured performance of various gate length DACs fabricated in a 1.2 /spl mu/m CMOS process including integral nonlinearity, differential nonlinearity, and slope and offset errors.