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Dive into the research topics where Sang-Ho Rha is active.

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Featured researches published by Sang-Ho Rha.


symposium on vlsi technology | 2003

A novel NF/sub 3/-HDP-CVD process for STI-filling in sub-90 nm DRAM and beyond

Yong-Won Cha; Sang-Ho Rha; Won-Jin Kim; Kyu-Tae Na; U-In Chung; Joo-Tae Moon

A complete filling of the shallow trench isolations (STI) in sub-90 nm DRAM is realized with the novel NF/sub 3/-HDP-CVD process. The gap-fill capability of the NF/sub 3/-HDP-CVD increased dramatically as NF/sub 3/ gas is added to the conventional SiH/sub 4//O/sub 2/ chemistry of HDP-CVD process. The effect of the NF/sub 3/-HDP-CVD processed STI is investigated by analyzing the transistor characteristics and yield in 512 M DRAM.


international conference on simulation of semiconductor processes and devices | 2006

Modeling of stress-dependent wet etch characteristic for P-SOG STI process

Jeong-Guk Min; Sang-Ho Rha; Tai-Kyung Kim; Uihui Kwon; Ju-seon Goo; Young-Kwan Park; Jeong-Taek Kong

Recently, spin-on-glass (SOG) oxide has been used as an important technology to overcome the gap-filling limit of conventional high density plasma (HDP) oxide in shallow trench isolation (STI) process. One of them, a novel polysilazane spin-on-glass (P-SOG) film shows a complex mechanical behavior during an annealing process and an abnormal etch loading effect in the wet process. These unique properties of P-SOG film give many opportunities to stress engineering. This paper proposed the simulation methodology to predict mechanical stresses in STI process by modeling the volumetric shrinkage phenomena of P-SOG and wet etch rate which is dependent on hydrostatic pressure. By interfacing a commercial FEM code, ABAQUS and in-house topography simulator, each of which has a portion of necessary models regarding P-SOG, we can predict the mechanical stress distribution on the various STI structures with real process profiles


Archive | 2005

Methods of forming a thin layer for a semiconductor device and apparatus for performing the same

Eun-Kyung Baek; Kyu-Tae Na; Sang-Ho Rha


Archive | 2014

Semiconductor devices including a capping layer and methods of forming semiconductor devices including a capping layer

Sang-Ho Rha; Jongmin Baek; Wookyung You; Sang-hoon Ahn; Nae-In Lee


Archive | 2008

Semiconductor device having trench isolation region and methods of fabricating the same

Kyung-Mun Byun; Ju-seon Goo; Sang-Ho Rha; Eun-Kyung Baek; Jong-Wan Choi


Archive | 2016

Semiconductor devices including a capping layer

Sang-Ho Rha; Jongmin Baek; Wookyung You; Sang-hoon Ahn; Nae-In Lee


Archive | 2016

Methods of Forming Wiring Structures and Methods of Fabricating Semiconductor Devices

Wookyung You; Sang-Ho Rha; Jongmin Baek; Sang-hoon Ahn; Nae-In Lee


Archive | 2006

Method of manufacturing a non-volatile semiconductor device

Hong-Gun Kim; Kyu-Tae Na; Eun-Kyung Baek; Ju-seon Goo; Sang-Ho Rha


Archive | 2014

Wiring structures and methods of forming the same

Jongmin Baek; Sang-Ho Rha; Wookyung You; Sang-hoon Ahn; Nae-In Lee; Ki-chul Kim; Jeon-II Lee


Archive | 2005

Methods of manufacturing silicon oxide isolation layers and semiconductor devices that include such isolation layers

Eunkee Hong; Ju-seon Goo; Kyu-Tae Na; Sang-Ho Rha

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