Satoshi Kumaki

A 99-mm/sup 2/, 0.7-W, single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder system

A scalable single-chip 422P@ML MPEG-2 video, audio, and system encoder LSI for portable 422P@HL system is described. The encoder LSI is implemented using 0.13 /spl mu/m embedded DRAM technology. It integrates 3-M logic gates and 64-Mbit DRAM in an area of 99-mm/sup 2/. The power consumption is suppressed to 0.7-Watts by adopting a low power DRAM core. It performs real-time 422P@ML video encoding, audio encoding, and system encoding with no external DRAM. Furthermore, the encoder LSI realizes a 422P@HL video encoder with multi-chip configuration, due to its scalable architecture. This results in a PC-card size 422P@HL encoder with lowest power consumption for portable HDTV codec system.

A single-chip MPEG2 422@ML video, audio, and system encoder with a 162-MHz media-processor and dual motion estimation cores

A single chip MPEG2 video, audio, and system encoder for various applications such as PC authoring, DVD-recorder and digital TV has been described. It performs real-time 422@ML video encoding, Dolby Digital (AC-3)/MPEG1 audio encoding, and system encoding which multiplexes the video and audio streams and generates a transport stream or a program stream. The encoder LSI employs an advanced hybrid architecture with a 162-MHz media-processor and dedicated video processing hardware. This architecture not only realizes a complete encoder but also achieves the high flexibility required for improving picture quality. Dual motion estimation cores, fine ME for high search precision and coarse ME for a wide search range, are integrated for optimal motion vector search. The encoder LSI is implemented using 0.25 micron four-metal CMOS technology and integrates 11 million transistors in an area of 14.2/spl times/14.2 mm/sup 2/.