Se Yeob Park

Effect of high-pressure oxygen annealing on negative bias illumination stress-induced instability of InGaZnO thin film transistors

Negative-bias illumination stress (NBIS) of amorphous InGaZnO (IGZO) transistors can cause a large negative shift (>7.1 V) in threshold voltage, something frequently attributed to the trapping of photoinduced hole carriers. This work demonstrates that the deterioration of threshold voltage by NBIS can be strongly suppressed by high-pressure annealing under 10 atm O2 ambient. This improvement occurred through a reduction in oxygen vacancy defects in the IGZO film, indicating that a photoinduced transition from VO to VO2+ was responsible for the NBIS-induced instability.

The Effect of Density-of-State on the Temperature and Gate Bias-Induced Instability of InGaZnO Thin Film Transistors

The impact of a gate insulator (GI) material on the device instability of InGaZnO (IGZO) thin film transistors (TFTs) was investigated. The IGZO TFTs with SiO 2 GI showed consistently better stability against the applied temperature stress and positive/negative gate bias stress than their counterparts with SiN x GI. This superior stability of the SiO 2 -gated device was attributed to the reduced total density of states (DOS) including the interfacial and semiconductor bulk trap densities. Based on the Meyer-Neldel rule, the total DOS energy distribution for both devices was extracted and compared, which can explain the experimental observation.

Improvement in both mobility and bias stability of ZnSnO transistors by inserting ultra-thin InSnO layer at the gate insulator/channel interface

This study examined the effect of the thickness of interfacial indium-tin oxide (ITO) on the performance and bias reliability of zinc-tin oxide (ZTO) thin film transistors (TFTs). The 3.5-nm-thick ITO-inserted ZTO TFTs exhibited superior mobility (43.2 cm2/V s) to that of the ZTO only TFTs (31.6 cm2/V s). Furthermore, the threshold voltage shifts for the ZTO/ITO bi-layer device decreased from 1.43 and −0.88 V (ZTO only device) to 0.46 V and −0.41 V under positive and negative bias stress, respectively. This improvement can be attributed to a decrease in the interfacial trap density for the ITO-inserted ZTO device.

Role of incorporated hydrogen on performance and photo-bias instability of indium gallium zinc oxide thin film transistors

This study examined the effects of hydrogen incorporation in amorphous indium gallium zinc oxide (IGZO) on the performance and photo-bias stability of the resulting thin-film transistors (TFTs). It was found that the threshold voltage of IGZO TFTs was negatively shifted without significant loss of the field-effect mobility and ION/OFF ratio with increasing hydrogen concentration, suggesting that interstitial hydrogen can act as a shallow donor. The hydrogen-doped device, however, showed more negative bias illumination stress (NBIS) instability than the undoped device, which cannot be explained by the simple shallow donor model. This NBIS-induced degradation might be associated with the increased tailing state distribution, which may stem from a hydrogen-related complex defect or compensation.

Improvement in the device performance of tin-doped indium oxide transistor by oxygen high pressure annealing at 150 °C

This study examined the effect of oxygen (O2) high pressure annealing (HPA) on tin-doped indium oxide (ITO) thin film transistors (TFTs). The HPA-treated TFT at 150 °C exhibited a high saturation mobility (μSAT), low subthreshold gate swing (SS), threshold voltage, and Ion/off of 25.8 cm2/Vs, 0.14 V/decade, 0.6 V, and 2 × 108, respectively. In contrast, the ambient-annealed device suffered from a lower μSAT and high SS value of 5.2 cm2/Vs and 0.58 V/decade, respectively. This improvement can be attributed to the decreased concentration of oxygen vacancy defects in the ITO channel layer during the effective O2 HPA treatment, which also resulted in smaller hysteresis and less degradation of the drain current under positive bias stress conditions.

Improvement in Photo-Bias Stability of High-Mobility Indium Zinc Oxide Thin-Film Transistors by Oxygen High-Pressure Annealing

This letter examines the effect of oxygen (O₂) high-pressure annealing (HPA) on indium zinc oxide (IZO) thin-film transistors (TFTs) with a high-quality Al₂O₃ passivation layer. The IZO TFTs anneal under an O₂ atmosphere at 9 atm exhibits a high field-effect mobility, low subthreshold gate swing, moderate threshold voltage (Vth), and high I_ON/OFF ratio of 30.4 cm²/Vs, 0.10 V/decade, 0.79 V, and 10⁸, respectively. In addition, the O₂ HPA-treated IZO TFT has superior reliability (ΔVth= -0.5 V) to that of the 0.2-atm-annealed device (ΔVth=-3.7 V) under negative bias illumination stress conditions. This improvement can be attributed to the reduced concentration of oxygen vacancy defects in the IZO channel layer during the O₂ HPA treatment.

Suppression in negative bias illumination stress instability of zinc tin oxide transistor by insertion of thermal TiO x films

This letter examined the insertion effect of thermal TiO₂ films on the device performance and photo-bias instability of zinc tin oxide (ZTO) thin-film transistors (TFTs). A 5.0-nm-thick TiO<i>x</i> device inserted at the ZTO/silicon nitride (SiN<i>x</i>) interface exhibited slightly lower mobility (9.4 cm²/V·s ) compared with that (14.1 cm²/V·s ) of the reference device with a ZTO/SiN<i>x</i> stack. On the other hand, the negative gate-bias-illumination-stress-induced instability of the TiO<i>x</i>-inserted device was strongly suppressed from 11.0 V (reference device) to 3.0 V. This was attributed to the increase in valence band offset between TiO<i>x</i> and ZTO films, leading to the diminished injection of photo-induced hole carriers into the underlying SiN<i>x</i> bulk region.

The effect of SiO 2 /SiN x bilayer structure on the bias and light-induced instability in InGaZnO TFTs

We investigated the effect of gate dielectric structure on the light-induced bias-temperature instability of IGZO TFT. After the application of light-induced negative bias stress, the SiO<inf>2</inf>/SiN<inf>x</inf> bilayer gate dielectric TFT exhibited the superior stability than single layer gate dielectric TFTs. Total applied electric field to bilayer gate dielectric layer(Device C) is −1.91MV/cm. However, electric field applied bilayer gate dielectrics divided between SiN<inf>x</inf>(−0.76MV/cm) and SiO<inf>2</inf>(−1.15MV/cm). In case of SiO<inf>2</inf> single layer(Device A) effective electric field is −1.52MV/cm. This result indicates that bilayer gate dielectric structure has reducing electric field to gate dielectric. In addition, we observed different recovery behavior after negative bias temperature illumination stress. SiO<inf>2</inf>/SiN<inf>x</inf> bilayer TFT showed quickly recovery after stress as same as SiO<inf>2</inf> single layer gate dielectric. This results can be explained photo-created charge temporary trapping at the SiO<inf>2</inf>/active interface. On the other hand, photo-created charge deeply injection to SiN<inf>x</inf> gate dielectric as well as trapping at the gate dielectrics/active interface.