Sébastien Petitdidier

Electrochemical study for the characterisation of wet silicon oxide surfaces

Abstract Because wet ultra-thin silicon oxides are extensively used in the microelectronic industry, we have investigated the growth of these oxides in various aqueous solutions using three main electrochemical techniques: (i) open circuit potential variation with time; (ii) linear voltammetry in a narrow range of potential; and (iii) electrochemical impedance spectroscopy under various polarisation potentials, to collect quantitative data regarding the growth kinetics of silicon oxide passivating layer, mainly at room temperature (r.t.). In oxidising alkaline solutions, the surface silicon oxide layer reached a limiting thickness value with time, related to oxidation/dissolution stationary behaviour. This observation was confirmed using ellipsometry. It was possible to reach with electrochemical techniques and ellipsometry the etching rate of the silicon substrate under the oxide layer in alkaline solution. Another interesting observation in this study was that the oxide layer showed a pronounced permeability to ions and oxidising agents in alkaline media, while this phenomenon vanished in acidic solutions.

3D integration demonstration of a wireless product with design partitioning

3D integration has now made a place in semiconductor landscape and is coming closer from implementation in manufacturing. Although process bricks are almost all available now, there are still several challenges to solve before it is introduced in standard flows. One of those which is not commonly addressed is to get final customers interest by showing him evaluations and results on real industrial applications. Heterogeneous integration and the possibility to partition different functions of a product in separate layers is one of the advantages of 3D integration. In this paper, product partitioning with TSV and 3D integration is demonstrated without inducing any impact on final product functionality and on early package level reliability tests.

R and C Impedance Components Equivalent to the Charge Distribution within Si-Substrate Depletion Layer

The zero current impedance of a silicon substrate in a semiconductor/oxide/electrolyte structure was used to identify the contribution of the depletion layer under various bias potentials. Careful measurements using p-Si in a HCl solution within the potential range of 0 to - 1 V vs. a saturated calomel electrode (SCE) led to the determination of the corresponding equivalent circuits as a function of the bias potential. Modeling the circuit as a constant phase element proved that the imaginary component was a pure capacitor C S C in parallel with a pure resistance R S C . Experimental data showed that these two components undergo a steep variation when the system approaches the silicon flatband potential situation. A novel fundamental development is presented, assuming that the gradient of potential inside the material is small enough for a simplified treatment based on the linearization of the exponential function. The steep increase in the vicinity of the flatband potential of the space charge capacitance and conductance was confirmed. This constitutes a useful tool for electrochemical studies to determine the flatband potential and band curvature as a function of the sample potential measured vs. the SCE reference electrode.

Thermo-mechanical study of a 2.5D passive silicon interposer technology: Experimental, numerical and In-Situ stress sensors developments

Thermo-mechanical stresses have proven to be a critical issue in a typical interposer integration and assembly flow. However the nature of passive interposer makes the integration of MOS-based stress sensors impossible. New methods are required. Using a coupling strategy between 3D Finite Element Models (FEM) and physical characterization, a method based on electrical measurement of passive stress sensors is presented here to assess stress at die- and wafer-level. Innovative combination of passive stress sensors based on rosettes of serpentine resistors have been developed and embedded to quantify local strain states in a typical interposer die. Their principle and implementation at a copper interconnect level of interposer are presented in this paper. Preliminary results are depicted, including first electrical measurements of these sensors. Electrical characterization has been performed after the back-side interconnection fabrication of the interposer. A local sensibility of each copper serpentine is highlighted. Discrepancies in the resistance values of orthogonal resistors could indicate local deformations to the environment of sensors, such as TSVs and bump pads. However, the order of magnitude of relative variation of resistance values is unexpectedly high and requires further investigations.

Effect of an Organic Inhibitor in High pH Chemical Rinse on the Platen for Cu-CMP

Copper dual damascene has been accepted to be the standard process for sub-quarter microelectronic interconnects. For the process, copper is deposited into an etched pattern by electroplating over a PVD barrier and seed layers. Then, copper chemical mechanical polishing (CuCMP) is used to remove the overburden Cu above the dielectric surface to achieve low topography. Then, the polished wafers are cleaned in order to achieve the minimum density of all kind of particles and impurities, as the final surface cleanliness will directly affect the final yield of the product. Main corrosion issues related to Cu-CMP [i,ii,iii,iv] are chemical corrosion due to uncontrolled copper dissolution, galvanic corrosion due to simultaneous exposure of copper and barrier metal to the slurry; and pattern specific corrosion due to the electrical separation of the lines after CMP and their connection to the devices. In order to prevent such defects, suppression of light during process [2,3], optimization of brush design [4] or addition of corrosion inhibitor in the slurry or the cleaning solution [ii,iii] are reported practices. The most used inhibitor in Cu-CMP chemistries is benzotriazole (BTA). The mechanism of the inhibition of Cu by BTA has been extensively studied in various mixtures and is considered to lower the anodic reaction by the formation of a Cu-BTA complex that can polymerise. The structure and the thickness of this passive film depend on the pH, the BTA concentration, the composition and the redox potential of the solution and the initial oxidation state of the Cu surface[v,vi]. Al-Hinai and Osseo-Asare [vii] showed that the formation of a homogeneous Cu-BTA film during polish is difficult because of the continuous abrasion of the Cu surface compared to nucleation and growth kinetics of film. The resulting Cu surface after the polish is likely covered by a homogeneous passive film. Rinsing the surface with a chemical containing another inhibitor immediately on the platen at a lower downward pressure could be a suitable process to re-inforce the passivation. But, it could significantly increase the organic contamination of the Cu surface. Since these organic Cu complexes are slowly soluble in aqueous solutions, their removal in the subsequent clean can generate carbon particles by redeposition. Although these defects may have little or no direct impact on yield, they often mask more important defectivity issues. In this study, the addition after polish of a wafer rinse containing an organic inhibitor in a high pH chemical was examined. The change in complexation and oxidation of the Cu surface was characterized using TOF-SIMS and completed by defect analysis on 120 and 90 nm products.

Neutron reflectivity study of ultrathin SiO2 on Si

Neutron reflectivity was applied to the study of ultrathin silicon oxide films, of interest due to the requirement for reduced dimensions of the elemental components in microelectronic devices [I. Eisele and W. Hansch, Thin Solid Films 369, 60 (2000); C. Battaglin et al., Thin Solid Films 351, 176 (1999)]. Silicon oxides were prepared using three different ways: Chemical, electrochemical, and thermal oxidation. From neutron reflectivity, it was possible to derive the oxide thickness, the Si/SiO2 interface roughness, and the density of the layer. In complementary measurements, the chemistry of the chemical and thermal surface layers was obtained by infrared spectroscopy. The anodic oxides were found to be as dense as thermal oxides, but the chemical one was less dense. This result was checked by Fourier transform infrared spectroscopy.

Elimination of Post Cu-CMP Watermark by Optimizing Post CMP Clean to Control Cu Dissolution

No watermarks are detected for 1000A of initial cap thickness. Between 400 and 600 A, the density of watermark is multiplied by a factor 10. The increase in watermark with the decrease of the initial cap thickness is explained by a larger low-k film area exposure. In particular, patterned structures with higher metal density will be more eroded because of the increased amount of in-between metal lines dielectric consumption. Auger analysis of the watermark indicates that defects consist of Cu precipitate likely originating from the post-CMP clean step.

Copper Surface Analysis with ToF-SIMS: Spectra Interpretation and Stability Issues

In integrated circuit manufacturing, surface cleanliness is mandatory to achieve high production volumes and device yield. Time-Of-Flight Mass Spectroscopy (ToF-SIMS) is an attractive technique for contamination control since it does provide information about both elemental and molecular species present on essentially any surface and offers high chemical sensitivity associated with sub-micrometer range spatial resolution and short acquisition time. The benefits of this technique to control surfaces after post copper chemical mechanical polishing (Cu-CMP) cleaning [1, 2] and after post via etch cleaning have already been reported.

Impact of Megasonic Activation with Different Chemistries on Silicon Surface in Single Wafer Tool

More and more, 300mm manufacturing promotes a single wafer tool approach in FEOL cleaning. Previously, we reported an advanced surface preparation process based on dilute HF/HCl/DIW and O3/HCl/DIW chemistries coupled with megasonic activation during the ozone step only, on a 300mm single-wafer platform [1]. As throughput consideration implies shorter process time, the activation of megasons during the whole cleaning step could be of interest for very small particle removal efficiency. Nevertheless, extending megasonic activation to the entire process sequence leads to degraded results on silicon surface. Indeed, damages are created at 90 and 65nm defect inspection levels when megasonic activation is used in the presence of both HF species and on hydrophobic silicon surface. In this paper, we demonstrate that the megasonic activation (Megs) generates randomly and locally oxidized species which may be the main cause of damages in the presence of HF chemistry. Additional characterizations are performed to understand this problem (haze inspections, ATR analysis and contact angle measurements).

Influence of the process conditions of a polishing rinse after CuCMP

Immediately after the CuCMP is completed, a polishing rinse is performed in order to remove abrasive of the slurry from the pad and wafer surfaces. The composition of the chemical used for this polishing rinse was demonstrated by Homma et al [1] to be determinant for the prevention of various corrosion defects. In this study, we propose to explore the influence of the process conditions (rinse time, polishing pressure and relative pad sliding velocity) during a polishing rinse on material removal rate, defectivity, electrical performance and surface chemical states. In parallel, the duration of the transition period where the remaining slurry on the pad is influencing the polishing rinse will be determined and its influence will be discussed.