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Featured researches published by Seiichiro Kanno.


Japanese Journal of Applied Physics | 2004

Wafer-Voltage Measurement in Plasma Processes by Means of a New Probe Method and an Impedance Monitor

Seiichiro Kanno; Junichi Tanaka; T. Tetsuka; Ryoji Nishio; Hideyuki Yamamoto

A new probe method, which can measure wafer voltage directly from the wafer back-side without fluctuating the plasma, was developed. This method clarified the effect of the bias power, gas pressure and gas component on wafer Vpp, Vdc, and Vdc/Vpp. In addition, current, voltage, and phase shift were measured with an impedance monitor (IM) installed between the matching network and the bias electrode. Furthermore, wafer Vpp was calculated from IM data according to a devised equivalent circuit model. It was found that calculated wafer Vpp agrees with actual wafer Vpp within 3.4% when bias power is ranged from 200 W to 500 W.


Japanese Journal of Applied Physics | 2003

A Novel Plasma Etching Tool with RF-Biased Faraday-Shield Technology: Chamber Surface Reaction Control in the Etching of Nonvolatile Materials

Manabu Edamura; Ken Yoshioka; Ryoji Nishio; Saburo Kanai; Tadamitsu Kanekiyo; Seiichiro Kanno; Nobuyuki Mise; Akira Doi; Hideyuki Kazumi

A novel electro-magnetically coupled plasma (EMCP) etching tool for nonvolatile materials has been developed. The EMCP etcher is based on inductively coupled plasma generation and has a function for controlling surface reactions by supplying RF bias to a Faraday shield which covers a ceramic discharge dome. We investigated plasma controllability and chamber surface reaction controllability of the EMCP etcher and found that the RF-biased Faraday shield effectively keeps the internal surface of the dome clean in the etching processes of nonvolatile materials. Because of this feature, the EMCP etcher can be applied to the etching processes of various nonvolatile materials such as Pt, Ru, Ir, NiFe, Au, Mo, Ta, Al2O3, HfO2, ZrO2, and indium tin oxide (ITO).


Archive | 2002

Wafer stage for wafer processing apparatus and wafer processing method

Seiichiro Kanno; Ken Yoshioka; Ryoji Nishio; Saburou Kanai; Hideki Kihara; Koji Okuda


Archive | 2001

Electrostatic chuck, and method of and apparatus for processing sample using the chuck

Seiichiro Kanno; Tatehito Usui; Ken Yoshioka; Saburo Kanai; Youichi Itou


Archive | 2002

Wafer processing apparatus and a wafer stage and a wafer processing method

Seiichiro Kanno; Hironobu Kawahara; Mitsuru Suehiro; Saburou Kanai; Toshio Masuda


Archive | 2001

Semiconductor manufacturing apparatus and method of processing semiconductor wafer using plasma, and wafer voltage probe

Seiichiro Kanno; Ryoji Nishio; T. Tetsuka; Junichi Tanaka; Hideyuki Yamamoto; Kazuyuki Ikenaga; Saburou Kanai


Archive | 1997

Electrostatic chuck, and method of and apparatus for processing sample

Seiichiro Kanno; Tatehito Usui; Ken Yoshioka; Saburo Kanai; Youichi Itou


Archive | 1996

Electrostatically attracting electrode and a method of manufacture thereof

Kazue Takahasi; Youichi Itou; Saburo Kanai; Seiichiro Kanno


Archive | 2009

Semiconductor inspecting apparatus

Go Miya; Seiichiro Kanno; Hiroyuki Kitsunai; Masaru Matsushima; Toru Shuto


Archive | 2003

Wafer stage for wafer processing apparatus

Seiichiro Kanno; Ken Yoshioka; Ryoji Nishio; Saburou Kanai; Hideki Kihara; Koji Okuda

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