Sergio C. Pires

Impact of the amplifier-BandPass reconstruction filter interaction on the linearity of carrier amplitude-burst transmitters

Carrier amplitude-burst transmitters can ideally deliver 100% efficiency and perfect linearity. The amplitude to time conversion performed by a PWM or sigma-delta modulator allows the usage of switched mode power amplifiers, at the expense of introducing a large amount of out of band noise, which must be removed by a narrow bandwidth band-pass reconstruction filter. However, practical implementations suffer from several problems whose cause is the careless design of the amplifier-filter connection, which prevent the achievement of those ideal performance figures. This paper discusses how the linearity of these transmitters is affected by the interaction between the switched-mode amplifier and the band-pass reconstruction filter providing design rules for this amplifier-filter interconnection. The presented results are obtained by both simulations and practical measurements.

RF carrier phase-burst transmitter

The potential high efficiency of RF carrier-burst transmitters has drawn the increasing attention of various researchers. This architecture uses an on-off mode of a constant-amplitude phase modulated carrier, according to the selected envelope-to-duty-cycle conversion (PWM or sigma-delta), requiring an implementation with two transistors, often in class-D configuration. This paper proposes a significant modification to this traditional architecture, where now the phase modulated carrier is always on - and thus allowing a single transistor implementation - but where the amplitude is impressed into the carrier phase according to a bi-phase code. A proof-of-concept prototype tested with a CDMA2000 signal achieved 59% of average efficiency and more than 34dBc of ACPR for an integrated output power of 24.7 dBm.

Envelope Modulator Selection for RF Carrier Phase-Burst Transmitters

This letter analyzes the performance of RF carrier phase-burst transmitters, implemented with a single-ended switched-mode power amplifier. Using a practical prototype and its corresponding theoretical operation model, the efficiency and linearity was measured and discussed for different envelope modulators. This theoretical analysis and its experimental validation led to the conclusion that optimized efficiency and linearity are obtained when envelope modulators of lower switching frequencies are used.

Towards circulator-free multi antenna transmitters for 5G

Multi-antenna transmitters based on Massive MIMO and beamforming will be one of the 5G enabler technologies. To have suitable commercial architectures for these transmitters, they must be scalable, cost-effective, energy efficient and present a high-level of integration. This paper presents a technique where the circulator (bulky and expensive) is no longer required in the architecture. This paper also addresses the mutual coupling between antennas as one of the main problems associated with the circulator removal and identifies the PA load impedance variation, efficiency degradation, distortion generation and EVM degradation as severe consequences. To mitigate these problems, a digital compensation technique is proposed and verified with measurements in a laboratorial setup using 6W ultra-compact 2-stages MMIC PAs. The obtained results show that it is possible to remove the circulator and keep almost similar performance as in the single antenna operation mode.

Modeling efficiency of carrier amplitude burst wireless transmitter systems

Despite the integrability and reconfigurability offered by fully digital wireless transmitters, their efficiency is still low, and no effective ways exist to diagnose and predict its degradation at higher back-off powers. Having found that it is the linear dependence of the switching losses with the output amplitude plus the inevitable constant losses that cause efficiency degradation at higher back-offs, an efficiency model was derived for carrier amplitude burst transmitter architectures. This model, not only allows the designer to predict the efficiency for a given modulation and output stage, but also allows one to identify the origin of the losses given an observed efficiency curve.

A study on the propagation times of loaded CMOS inverters

The CMOS inverter plays an important role in digital CMOS design. Digital CMOS components in general depend on optimization techniques that have been proposed taking as reference the CMOS inverter. CMOS inverter optimization is often based on the equilibrium of the propagation times. The factors that affect these propagation times are numerous, namely: transistor dimensions, loading conditions, Miller effect and second order effects potentiated by the scaling of the CMOS technology. This paper explores new perspectives on the matching of the CMOS inverter propagation times, due to nonlinear loading conditions. Theoretical and simulation evidence shows that, the propagation times depend on several loading parameters when the load is a similar inverter rather than a simple linear capacitor.

Co-location of different technologies in the same site

The aim of this paper is to promote the discussion and raise peoplepsilas awareness towards the creation of recommendations and regulations to improve the installation of different technologies in the same site. This research was accomplished with a theoretical approach and verified with real measurements of commercial Tower Mounted Amplifiers (TMApsilas).