Shao-Ming Koh

Contact Technology for Strained nFinFETs With Silicon–Carbon Source/Drain Stressors Featuring Sulfur Implant and Segregation

In this work, strained n-channel FinFETs (nFinFETs) with silicon-carbon (Si:C) source/drain (S/D) stressors featuring NiSi:C contacts with segregated sulfur at the NiSi:C/Si:C interface are investigated in detail. The physical mechanism for the reduction in an effective Schottky barrier for electrons ΦBn due to presilicide sulfur ion implant and segregation is examined. The presence of sulfur near the NiSi:C/Si:C interface and its behavior as charged donor-like trap states was used to explain the enhancement of electron tunneling across the contact and the reduction in ΦBn down to 110 meV. New analysis using numerical simulation is presented. The results indicate that the presence of charged states near the interface plays a role in achieving low ΦBn. When the S-segregated NiSi:C contact was integrated in strained nFinFETs with Si:C S/D stressors, external series resistance is reduced, and the drive current is improved. The dependence of the drive current on fin width and gate length is also studied.

Contact-Resistance Reduction for Strained n-FinFETs With Silicon–Carbon Source/Drain and Platinum-Based Silicide Contacts Featuring Tellurium Implantation and Segregation

Tellurium (Te) implantation was introduced to tune the effective electron Schottky barrier height (SBH) ΦBn of platinum-based silicide (PtSi) contacts formed on n-type silicon-carbon (Si:C). Te introduced by ion implantation prior to Pt deposition segregated at the PtSi:C/Si:C interface during PtSi:C formation. The presence of Te at the PtSi:C/Si:C interface leads to a low ΦBn of 120 meV for PtSi:C contacts. The integration of Te-segregated PtSi:C contacts on strained n-channel fin field-effect transistors (FinFETs) with Si:C source/drain (S/D) stressors achieves the lowering of the parasitic series resistance RSD by ~62% and increases the saturation drive current by ~22%. The Te-segregated contact-resistance reduction technology does not degrade the short-channel effects and positive-bias temperature instability characteristics of n-FinFETs with Si:C S/D. As PtSi has a low SBH for holes and is a suitable contact for p-FinFETs, this new contact-resistance reduction technology has potential to be introduced as a single-metal-silicide dual-barrier-height solution for future complementary metal-oxide-semiconductor FinFET technology.

N-Channel MOSFETs With Embedded Silicon–Carbon Source/Drain Stressors Formed Using Cluster-Carbon Implant and Excimer-Laser-Induced Solid Phase Epitaxy

In this letter, we report the use of a novel cluster-carbon (C₇ H₇ ⁺) implant and pulsed-excimer-laser-induced solid-phase-epitaxy technique to form embedded silicon-carbon (Si:C) source/drain (S/D) stressors. A substitutional carbon concentration C_sub of ~ 1.1% was obtained in this letter. N-channel MOSFETs (n-FETs) integrated with embedded silicon-carbon (Si:C) S/D stressors formed using the novel cluster-carbon implant and pulsed-laser-anneal technique demonstrate improvement in current drive of 14% over control n-FETs formed with Si preamorphization implant. I_OFFI_DSAT comparison shows a 15% I_DSAT enhancement for n-FETs with embedded Si:C S/D at an I_OFF = 1 nA/mum despite a slightly higher series resistance.

Self-aligned contact metallization technology for III-V metal-oxide-semiconductor field effect transistors

The demonstration of a salicidelike self-aligned contact technology for III-V metal-oxide-semiconductor field-effect transistors (MOSFETs) is reported. A thin and continuous crystalline germanium-silicon (GeSi) layer was selectively formed on n+ doped gallium arsenide (GaAs) regions by epitaxy. A new self-aligned nickel germanosilicide (NiGeSi) Ohmic contact with good morphology was achieved using a two-step annealing process with precise conversion of the GeSi layer into NiGeSi. NiGeSi contact with the contact resistivity (ρc) of 1.57 Ω mm and sheet resistance (Rsh) of 2.8 Ω/◻ was achieved. The NiGeSi-based self-aligned contact technology is promising for future integration in high performance III-V MOSFETs.

Schottky barrier height tuning of silicides on p-type Si (100) by aluminum implantation and pulsed excimer laser anneal

We investigate the tuning of Schottky barrier height (SBH) of nickel silicide formed by pulsed excimer laser anneal of nickel on silicon implanted with aluminum (Al). A wide range of laser fluence was investigated, and it has been found that laser fluence influences the distribution of Al within the silicide and at the silicide/silicon interface. This in turn affects the effective whole SBH (ΦBp) at the silicide/silicon junction. High Al concentration at the silicide/silicon interface and high temperature for nano-second duration to achieve Al activation while keeping the Al concentration within the silicide low is vital for achieving low ΦBp. We demonstrate the achievement of one of the lowest reported ΦBp of ∼0.11 eV. This introduces a new option for forming nickel silicide contacts with reduced contact resistance at low thermal budget for possible adoption in future metal-oxide-semiconductor transistor technologies.

Source/Drain Engineering for In0.7Ga0.3As N-Channel Metal–Oxide–Semiconductor Field-Effect Transistors: Raised Source/Drain with In situ Doping for Series Resistance Reduction

In this paper, we report N-channel metal–oxide–semiconductor field-effect transistors (N-MOSFETs) featuring in situ doped raised In0.53Ga0.47As source/drain (S/D) regions. This is the first demonstration of such regrowth on an In0.7Ga0.3As channel. After SiON spacer formation, the raised In0.53Ga0.47As S/D structure was formed by selective epitaxy of In0.53Ga0.47As in the S/D regions by metal-organic chemical-vapor deposition (MOCVD). In situ silane SiH4 doping was also introduced to boost the N-type doping concentration in the S/D regions for series resistance RSD reduction. The raised S/D structure contributes to IDsat enhancement for the In0.7Ga0.3As N-MOSFETs.

Carrier transport in strained N-channel field effect transistors with channel proximate silicon-carbon source/drain stressors

We investigate the carrier transport characteristics in strained n-channel metal-oxide-semiconductor field effect transistors (nFETs) with embedded silicon-carbon (Si:C) source/drain (S/D) stressors formed in close proximity to the channel, taking parasitic resistance into account in the extraction of carrier transport parameters. While bringing the Si:C S/D stressors closer to the channel improves their effectiveness in imparting tensile strain to the channel, degradation in ballistic efficiency due to increased carrier scattering is observed. Fortunately, this is more than compensated by an increase in the carrier injection velocity vinj. For channel-proximate (CP) Si:C S/D nFETs with gate lengths ranging from 100 to 130 nm, a ∼10% drive current IDsat enhancement is observed with a ∼15% improvement in vinj. These findings clarified experimentally that in addition to mobility enhancement, vinj improvement also plays a significant role in the IDsat enhancement achieved by CP Si:C S/D nFETs.

Novel technique to engineer aluminum profile at nickel-silicide/Silicon:Carbon interface for contact resistance reduction, and integration in strained N-MOSFETs with silicon-carbon stressors

We report a new technique of achieving reduced nickel silicide contact resistance in strained n-FETs, where a pre-silicide Aluminum (Al) implant was introduced, and the Al profile was controlled/engineered by Carbon (C). C suppresses Al diffusion during silicidation, hence retaining high concentration of Al within the NiSi. Incorporating Al within NiSi reduces the Schottky barrier height for n-Si:C contact, leading to 18 % IOn improvement for Si:C S/D nFETs with no compromise on short channel effects.

Silicon-Carbon Formed Using Cluster-Carbon Implant and Laser-Induced Epitaxy for Application as Source/Drain Stressors in Strained n-Channel MOSFETs

Supersaturated and metastable silicon-carbon (Si:C) source/drain (S/D) stressors produced by laser anneal allow strain engineering for device performance enhancement. We report the use of a cluster-carbon (C 7 H + 7 ) implant and pulsed excimer laser-induced epitaxial crystallization technique to form embedded Si:C S/D stressors with substitutional carbon concentration C sub of ∼ 1.1%. Transmission electron microscopy, secondary-ion mass spectrometry, and high resolution X-ray diffraction is used to characterize the structure and composition. n-field effect transistors (FETs) integrated with embedded Si:C S/D stressors formed using the C 7 H + 7 implant and pulsed laser anneal technique demonstrate improvement in I off -I DSAT performance of ∼16% over control n-FETs formed without carbon implant at an I off = 1 X 10 -7 A/μm. Cluster-Carbon implant and laser anneal presented in this work is a simple and cost-effective approach to boost I DSAT performance and is a promising option for strain-engineering in advanced technology nodes.

A new Ge 2 Sb 2 Te 5 (GST) liner stressor featuring stress enhancement due to amorphous-crystalline phase change for sub-20 nm p-channel FinFETs

We report the first demonstration of a novel Ge2Sb2Te5 (GST) liner stressor which can be shrunk or contracted (in volume) during phase-change to realize performance enhancement in p-channel FinFETs. FinFETs with ultra-scaled gate length down to ∼4.5 nm were used. Amorphous GST (α-GST) liner has intrinsic stress that increases the p-FinFET drive current as compared to unstrained control devices. Further, when the a-GST changes phase to crystalline GST (c-GST), the GST liner contracts, leading to very high channel stress and drive current enhancement.