Shinichi Jinbo

Semiconductor memory device adaptable to various types of packages

Power supply circuit for generating an internal power supply potential based on an external potential

Circuit for adjusting a voltage level in a semiconductor device

Semiconductor device e.g. processor has internal power supply circuit which generates internal signal based on relation between voltage levels of reference voltage and clock input signal

Internal current supply circuit for semiconductor storage device, e.g. DRAM

Semiconductor memory device for voltage generating circuit, has banks with memory cells, and predecoder selecting and deselecting banks according to addresses received from buffer and latch output

DRAM has bonding pads arranged on east/west band on peripheral region along two opposing sides of DRAM and outermost power supply pads arranged near center of north/south band

Halbleiterspeichervorrichtung, die eine hochdichte Struktur oder eine hohe Leistung ermöglicht

Semiconductor memory with data refreshing for DRAM

Auffrischeinrichtung für eine Halbleiterspeichereinrichtung Refresh means for a semiconductor memory device