Shiro Hosotani

A dynamic voltage sensing FIFO suitable for multi-format video systems

A dynamic voltage sensing FIFO which can operate at high frequencies up to 100 MHz has been developed. The dynamic voltage sensing scheme realizes high operating speed, low power consumption and small die area. For further performance enhancement, the power consumption can be optimized by a power adjusting function and an address signal hold function. These two functions enhance the performance when this FIFO operates at lower frequencies or with a smaller word length according to the input formats. The test chip (1152 words by 8 bits) exemplified low power consumption (19 mW) and small die area (1.31 mm/sup 2/) and was constructed with 0.5 um CMOS technology.