Shoji Ariizumi
Toshiba
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Publication
Featured researches published by Shoji Ariizumi.
international solid-state circuits conference | 1986
Shoji Ariizumi; Taira Iwase; Makoto Takizawa; T. Mocozuki; M. Ono; K. Maeda; Masamichi Asano; F. Masuoka
This report will cover the development of a 70ns 2Mb CMOS mask ROM with a through-hole programmed memory, using double-poly layers and self-aligned contact. With 1.5μm design rules, the die measures 6.57 × 11.9mm.
international solid-state circuits conference | 1986
Makoto Segawa; Shoji Ariizumi; Y. Suzuki; T. Kondo; T. Ando; K. Ochii; F. Masuoka
An 8K×9 NMOS SRAM using a shared-word line and one-eighth activated row decoder circuit, achieving 18ns access times and 500mW active power dissipation, will be reported. The SRAM was fabricated in 1.5μm double-poly, double-metal process.
Archive | 1987
Shoji Ariizumi
Archive | 1984
Makoto Segawa; Shoji Ariizumi
Archive | 1984
Shoji Ariizumi; Makoto Segawa
Archive | 1981
Makoto Segawa; Shoji Ariizumi
Archive | 1980
Shoji Ariizumi; Makoto Segawa
Archive | 1988
Youichi Suzuki; Makoto Segawa; Shoji Ariizumi; Takeo Patent Division Kondo; Fujio Patent Division Masuoka
Archive | 1985
Shoji Ariizumi
Archive | 1982
Makoto Segawa; Shoji Ariizumi
