Shubhada H. Sahasrabudhe

Use-condition-based cyclic bend test development for handheld components

For handheld electronic applications such as cell phones and personal digital assistants (PDAs), repeated key strokes could result in considerable flexure of the printed circuit board (PCB) mounted inside the housing. In this study, a standardized four-point bend test, including test board design, test setup, and test input level, has been developed. The S-N curve has been obtained by plotting the reliability at all deflection levels as a function of solder joint strain energy density. The effect of test frequency has also been evaluated. The reliability model prediction of three-point bend reliability matches the experimental data extremely well. The transfer function between reliability stressing and field condition is a strain-energy-density-based power law relationship. Finite element simulation has been conducted for the worst-case cell phone subjected to key presses. The use condition data including strain profiles and frequency have been incorporated in the field life prediction. The four-point bend performance can be converted into the component reliability during cell-phone field use conditions. This study establishes the correlation between the use conditions and reliability tests. The cyclic four-point bend test will be implemented in the JEDEC bend test standard for handheld components.

Understanding the effect of dwell time on fatigue life of packages using thermal shock and intrinsic material behavior

Although empirically based relationships for fatigue based on temperature change (AT) have long existed for metals (Coffin-Manson, etc.), their translation to package reliability applications have often yielded inexplicable differences. These contradictions can now begin to he explained through physics based deductions about the material properties of the composite package and additional details surrounding the temperature cycle profile, specifically the ramp rate and dwell time. The technique outlied in this paper focuses on assessing thermo-mechanical fatigue for package level assemblies. By coupling the time to data merits of a thermal shock metrology with the precision of in-situ response monitoring and linking the results hack to intrinsic material properties, a deeper understanding is being formulated in the reliability modelig of thermo-mechanical failures. Through the integration of this meh-ology, data acquisition, and material property measurement techniques, faster and more accurate reliability assessments can he drawn.

Thermal-mechanical considerations during thermal solution assembly of bare-die packages

The demands for thinner bare-die BGA packages for overall stack height reduction and electrical performance improvement has added complexity for thermal solution design, manufacturing and assembly processes associated with microelectronic packages in mobile computer systems. Typically, in the computer system manufacturing process, the thermal solution assembly is typically a manual process. The interaction with the bare-die package component stack during the assembly process is very critical, creating a need for an in-depth characterization to understand the impact of design and manufacturing on product quality and performance. Modeling and experimental methodologies are developed to understand and quantify the complex interactions of thin bare-die package with thermal solution and evaluate potential thermo-mechanical risks as well as potential mitigation options. Areas that are discussed in the paper include assessments of structural integrity at the component and board levels to identify potential fail modes, component thermal performance, impact of commonly used thermal solution options for cold plate designs, retention mechanisms and enabling load distribution and the influence of thermal solution assembly process. Recommendations for improved thermal enabling are also discussed.

Phenomenological understanding of Sn migration in ceramic-chip capacitors

Electrochemical migration (ECM) is a well documented phenomenon in literature involving the transport of metal ions under the influence of voltage and in the presence of an electrolyte. This paper describes the classic Sn migration phenomenon that occurs with SAC305 solder used to attach capacitors on Intels microelectronic packages, under accelerated humidity voltage tests. Additional lab-scale surface insulation resistance (SIR) tests, which replicated the accelerated test failures, were performed to understand the impact of moisture level, the critical voltage required and effect of ionic environment on the Sn migration phenomenon. As capacitor sizes continue to get smaller, leading to a greater risk of solder metal migration with electrode lines getting closer to each other, results from this study can be expected to improve the design of packages in future technologies.

Use-Conditions-Based Board Level Shock Test Development for Handheld Components

For handheld electronic applications such as cell phones and Personal Digital Assistants (PDAs), drop/impact could result in considerable flexure of the printed circuit board (PCB) mounted inside the cell phone housing. The mechanical stresses may cause electrical failure of the components, with typical failure mechanisms of board trace cracking, solder joint fatigue, and solder pad cracking. A standardized test needs to be developed to assess reliability of handheld components subjected to impacts. The test should facilitate high volume testing, maximize margin for safety factors, and capture the failure mechanisms in the field environment. To develop the reliability test using use conditions based reliability methodology, comprehensive characterization of the mechanical field stresses during end use conditions is particularly essential. This paper discusses complete cell phone drop characterization along with the shock test developed to test the components subjected to such drops. Novel fixtures have been designed to simulate free fall of the cell phone in specific orientations. After the complete characterization of cell phone use conditions, board level shock test has been selected to assess component reliability. Test repeatability, number of components on the test board, and layout of the components are some of the factors considered during the board level shock test development. Several parameters like screw and washer designs, torque have been studied to yield excellent test repeatability. Nonlinear Dynamic Finite Element Simulation has been performed to provide more insight into the interaction of the bending modes and its impact on the solder joint failures. This paper demonstrates the process of understanding use conditions, developing reliability tests, validating test results and driving industry standards.Copyright