Sinsu Kyoung

A Novel Trench IGBT With a Deep

The trench insulated gate bipolar transistor (TIGBT) suffers from breakdown voltage degradation due to the electric field crowding at the corner of the trench gate in the forward blocking state. We propose a new TIGBT structure that has a deep p+ layer beneath the trench emitter to distribute the concentrated electric field. The deep p+ layer of the structure is formed by ion implantation at the bottom of the trench after a partial etching of the p-base region. The proposed structure improves the breakdown voltage compared to conventional TIGBTs without changing the threshold voltage and with quite a small change of on-state voltage drop. The distribution of the electric field is also changed by its design parameters. When the positions of the trench gate corner and the deep p+ layer are nearer, the breakdown voltage is higher. The distribution effect operates when the doping level of the deep p+ layer exceeds the appropriate value to prevent punchthrough between the metal electrode and the n-drift region. This structure can be applied easily to various TIGBTs with simple-process additions.

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A power semiconductor device, usually used as a switch or rectifier, is very significant in the modern power industry. The power semiconductor, in terms of its physical properties, requires a high breakdown voltage to turn off, a low on-state resistance to reduce static loss, and a fast switching speed to reduce dynamic loss. Among those parameters, the breakdown voltage and on-state resistance rely on the doping concentration of the drift region in the power semiconductor, this effect can be more important for a higher voltage device. Although the low doping concentration in the drift region increases the breakdown voltage, the on-state resistance that is increased along with it makes the static loss characteristic deteriorate. On the other hand, although the high doping concentration in the drift region reduces on-state resistance, the breakdown voltage is decreased, which limits the scope of its applications. This addresses the fact that breakdown voltage and on-state resistance are in a trade-off relationship with a parameter of the doping concentration in the drift region. Such a trade-off relationship is a hindrance to the development of power semiconductor devices that have idealistic characteristics. In this study, a novel structure is proposed for the Insulated Gate Bipolar Transistor (IGBT) device that uses conductivity modulation, which makes it possible to increase the breakdown voltage without changing the on-state resistance through use of a P-floating layer. More specifically in the proposed IGBT structure, a P-floating layer was inserted into the drift region, which results in an alleviation of the trade-off relationship between the on-state resistance and the breakdown voltage. The increase of breakdown voltage in the proposed IGBT structure has been analyzed both theoretically and through simulations, and it is verified through measurement of actual samples.

Layer Beneath the Trench Emitter

Although trench gate and super-junction technology have micro-trench problems when applied to the SiC process due to the material characteristics. In this paper, area effects are analyzed from the test element group with various patterns and optical proximity correction (OPC) methods are proposed and analyzed to reduce micro-trenches in the SiC trench etching process. First, the loading effects were analyzed from pattern samples with various trench widths (Wt). From experiments, the area must limited under a proper size for a uniform etching profile and reduced micro-trenches because a wider area accelerates the etch rate. Second, the area effects were more severely unbalanced at corner patterns because the corner pattern necessarily has an in-corner and out-corner that have different etching areas to each other. We can balance areas using OPC patterns to overcome this. Experiments with OPC represented improved micro-trench profile from when comparing differences of trench depth (Δdt) at out corner and in corner. As a result, the area effects can be used to improve the trench profile with optimized etching process conditions. Therefore, the trench gate and super-junction pillar of the SiC power MOSFET can have an improved uniform profile without micro-trenches using proper design and OPC.

A Study on Characteristic Improvement of IGBT with P-floating Layer

Two critical issues in the electrical characteristics of the 4H-SiC junction barrier Schottky (JBS) diode are the OFF-state leakage current and the ON-resistance, which are in a tradeoff relationship. To overcome the limitations resulting from these electrical characteristics, an unbalanced layout method is proposed in this letter. It can be verified that the difference in the mobility at the sides and at the center of the chip is because of the temperature distribution in JBS discrete devices. Hence, a JBS discrete device chip using the unbalanced layout method is fabricated, which has a higher ratio of Schottky barrier diode, which is ratio of the junction area: Schottky area in one cell, at the sides of the chip than at the center. The OFF-state leakage current of the unbalanced layout design is 100 times smaller than that of the reference model, for the same ON-state current.

Investigation of the layout and optical proximity correction effects to control the trench etching process on 4H-SiC

Power semiconductor devices have been the major backbone for high-power electronic devices. One of important parameters in view of power semiconductor devices often characterize with a high breakdown voltage. Therefore, many efforts have been made, since the development of the Insulated Gate Bipolar Transistor (IGBT), toward having higher level of breakdown voltage, whereby the typical design thereof is focused on the structure using the field ring. In this study, in an attempt to make up more optimized field-ring structure, the characteristics of the field ring were investigated with the use of theoretical arithmetic model and methodologically the design of experiments (DOE). In addition, the IGBT having the field-ring structure was designed via simulation based on the finding from the above, the result of which was also analyzed. Lastly, the current study described the trench field-ring structure taking advantages of trench-etching process having the improved field-ring structure, not as simple as the conventional one. As a result of the simulation, it was found that the improved trench field-ring structure leads to more desirable voltage divider than relying on the conventional field-ring structure.

Unbalanced Layout Method for the 4H-SiC JBS Diode Offering Improved Tradeoff between Leakage Current and ON-Resistance

To protect power MOSFET gate oxide from ESD in fundamentally, On-chip ESD protecting circuits are required. In this paper, stacked punchthrough diode made of doped polysilicon between gate pad and source pad is suggested for 900 V power MOSFET gate ESD protection. The suggested device was designed and analyzed in electrical characteristics by TCAD simulation. Based on this analysis, stacked punchthrough diode for 900 V power MOSFET gate ESD protection is optimized.

A Study of Field-Ring Design using a Variety of Analysis Method in Insulated Gate Bipolar Transistor (IGBT)

Photo diode (PD) well potential of 4-Tr CMOS image sensor (CIS) is changed according to the axial direction of off-axis wafer slicing which minimizes the channeling effect of ion implantation process. Channeling causes an incomplete charge transfer in the PD, and then results in the loss of PD well capacity eventually. In this paper, the effect of the axial direction of wafer slicing on the PD well potential profile is simulated with TCAD tool and the simulation result is examined through CMOS process actually. Furthermore, we show a way to compensate the change of effective tilt angle during the ion implantation process for creating N-type region in PD.

On-chip stacked punchthrough diode design for 900V power MOSFET gate ESD protection

Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration , size of with , and off-state leakage current below . We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

Analysis of charge transfer loss induced by off-axis slicing in CMOS image sensor

This paper presents a comprehensive mathematical analysis and simulation of trench IGBT with the help of PIN-PNP combinational model. Since trench IGBT is characteristically influenced by PIN diode, it may be almost impossible to analyze the trench IGBT using PNP-MOS modeling methods, even PIN-MOS techniques which neglect the hole current components coming into p-base region. A new PIN-PNP complementary cooperational model is developed in order to make up the drawbacks of existing models. It would allow us to make qualitative analysis as well as simulation about switching and on-state characteristics of 1,700 V trench IGBT. Moreover, if we improve the PIN diode effects through the optimization of trench structure, trench IGBT is expected to be one of the most promising devices in the not only high-voltage but also high speed switching device field.

A Design Method on Power Sense FET to Protect High Voltage Power Device

The conventional IGBT has two problems to make the device taking high performance. The one is high on state voltage drop associated with JFET region, the other is low breakdown voltage associated with concentrating the electric field on the junction of between p base and n drift. This paper is about the structure to effectively improve both the lower on state voltage drop and the higher breakdown voltage than the conventional IGBT. For the fabrication of the circular trench IGBT with the circular trench layer, it is necessary to perform the only one wet oxidation step for the circular trench layer. Analysis on both the on state voltage drop and the breakdown voltage show the improved values compared to the conventional IGBT structure. Because the circular trench layer disperses electric field from the junction of between p base and n drift to circular trench, the breakdown voltage increase. The on state voltage drop decrease due to reduction of JFET region and direction changed of current path which pass through reversed layer channel. The electrical characteristics were studied by MEDICI simulation results.